DS1677

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TIME OF DAY ALARM BITS Table 1

ALARM REGISTER MASK BITS (BIT 7)

SECONDS

MINUTES

HOURS

DAYS

1

1

1

1

Alarm once per second.

0

1

1

1

Alarm when seconds match.

0

0

1

1

Alarm when minutes and seconds match.

0

0

0

1

Alarm when hours, minutes and seconds match.

0

0

0

0

Alarm when day, hours, minutes and seconds match.

SPECIAL PURPOSE REGISTERS

The DS1677 has two additional registers (control register and status register) that control the Real Time

Clock and interrupts.

CONTROL REGISTER

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

EOSC

WP

AIS1

AIS0

0

0

0

AIE

EOSC (Enable Oscillator) – This bit, when set to logic 0 will start the oscillator. When this bit is set

to a logic 1, the oscillator is stopped and the DS1677 is placed into a low–power standby mode with a

current drain of less than 200 nanoamps when in battery back–up mode. When the DS1677 is powered

WP (Write Protect) – Before any write operation to the real time clock or any other registers, this bit

must be logic 0. When high, the write protect bit prevents a write operation to any register.

AIS0–AIS1 (Analog Input Select) – These 2 bits are used to determine the analog input for the

analog–to–digital conversion. Table 2 lists the specific analog input that is selected by these 2 bits.

AIE (Alarm Interrupt Enable) – When set to a logic 1, this bit permits the Interrupt Request Flag

(IRQF) bit in the status register to assert INT. When the AIE bit is set to logic 0, the IRQF bit does not

initiate the INT signal.

ANALOG INPUT SELECTION Table 2

AIS1

AIS0

ANALOG INPUT

0

0

NONE

01

AIN0

10

AIN1

11

AIN2

STATUS REGISTER

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

CU

LOBAT

0000

0

IRQF