DS2480 datasheet(8/26 Pages) DALLAS

8 / 26 page

DS2480

042498 8/26

Searching the 1–Wire bus to identify all ROM IDs of the

devices connected, however, requires reading two bits,

making a decision and then writing a bit. This procedure

is to be repeated 64 times to identify and address a

single device. With the overhead of modern operating

systems this fairly simple process takes a lot of time,

reducing the discovery rate of devices on the 1–Wire

bus from a typical value of 40 to 50 per second under

DOS to less than 10 under Windows. To solve this prob-

lem the Search Accelerator was developed.

The Search Accelerator receives from the host informa-

tion on the preferred path to chose during the execution

of the Search ROM function as one contiguous chain of

bytes and then translates it into the appropriate time

slots on the 1–Wire bus. In addition, the Search Acceler-

ator reports back to the host the ROM ID of the device

actually addressed and the bit positions in which con-

flicts were found. (If the ROM ID of one device has a 0 in

a bit position where another device has a 1, this is called

a “conflict” on the electrical level and “discrepancy” on

the logical level. See the Book of DS19xx iButton Stan-

dards for a more detailed discussion of the Search

ROM). This helps the host to select the preferred path

for the next Search ROM activity.

Since the ROM ID of all MicroLAN compatible devices is

64 bits long and a conflict may occur in any of these bits,

the total length of data reported to the host is 128 bits or

16 bytes. To avoid data overrun (if the CPU sends data

faster than it can be processed) the protocol for the

Search Accelerator operation was defined so that one

has to send as many bytes as one will receive. This way

the CPU sends 16 bytes for each path and the UART

guarantees the correct data timing and frees the CPU

for other tasks while the DS2480 performs a Search

ROM function.

SEARCH ACCELERATOR OPERATION

After the Search Accelerator is activated and the data

mode is selected, the host must send 16 bytes to com-

plete a single Search ROM pass on the 1–Wire bus.

These bytes are constructed as follows:

first byte

et cetera

16th byte

r63

x63

r62

x62

r61

x61

r60

x60

In this scheme, the index (values from 0 to 63, “n”) des-

ignates the position of the bit in the ROM ID of a Micro-

LAN compatible device. The character “x” marks bits

that act as filler and do not require a specific value (don’t

care bits). The character “r” marks the path to go at that

particular bit in case of a conflict during the execution of

the ROM Search.

For each bit position n (values from 0 to 63) the DS2480

will generate three time slots on the 1–Wire bus. These

are referenced as:

for the first time slot (read data)

for the second time slot (read data) and

for the third time slot (write data).

The type of time slot b2 (write 1 or write 0) is determined

by the DS2480 as follows:

= rn if conflict (as chosen by the host)

= b0 if no conflict (there is no alternative)

= 1 if error (there is no response)

The response the host will receive during a complete

pass through a Search ROM function using the Search

Accelerator consists of 16 bytes as follows:

first byte

r’3

r’2

r’1

r’0

et cetera

16th byte

r’63

d63

r’62

d62

r’61

d61

r’60

d60

As before, the index (values from 0 to 63, “n”) desig-

nates the position of the bit in the ROM ID of a MicroLAN

compatible device. The character “d” marks the discrep-

ancy flag in that particular bit position. The discrepancy

flag will be 1 if there is a conflict or no response in that

particular bit position and 0 otherwise. The character

“r’ ” marks the actually chosen path at that particular bit

position. The chosen path is identical to b2 for the partic-

ular bit position of the ROM ID.

DS2480 Datasheet(PDF) 8 Page - Dallas Semiconductor

DS2480 Datasheet(HTML) 8 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Datasheet Download

Link URL