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ICS85408I Datasheet(PDF) 13 Page - Integrated Device Technology |
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ICS85408I Datasheet(HTML) 13 Page - Integrated Device Technology |
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13 / 16 page ![]() ICS85408I Datasheet LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP ICS85408BGI REVISION B JULY 2, 2009 13 ©2009 Integrated Device Technology, Inc. Reliability Information Table 7. θ JA vs. Air Flow Table for a 24 Lead TSSOP Transistor Count The transistor count for ICS85408I is: 1821 Pin compatible with SN65LVDS104 Package Outline and Package Dimensions Package Outline - G Suffix for 24 Lead TSSOP Table 8. Package Dimensions Reference Document: JEDEC Publication 95, MO-153 θ JA by Velocity Meters per Second 01 2.5 Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 65.0°C/W 62°C/W All Dimensions in Millimeters Symbol Minimum Maximum N 16 A 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 7.70 7.90 E 6.40 Basic E1 4.30 4.50 e 0.65 Basic L 0.45 0.75 α 0° 8° aaa 0.10 |
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