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* This specification are subject to be changed without notice.

7.20.1999

EM73201

4-BIT MICRO-CONTROLLER FOR GENERAL PURPOSE PRODUCT

Preliminary

There are four kinds of flag, CF ( Carry flag ), ZF ( Zero flag ), SF ( Status flag ) and GF ( General flag ),

these 4 1-bit flags are affected by the arithematic, logic and comparative .... operation .

All flags will be put into stack when an interrupt subroutine is served, and the flags will be restored after

RTI instruction executed .

(1) Carry Flag ( CF )

The carry flag is affected by following operation:

a. Addition : CF as a carry out indicator, when the addition operation has a carry-out, CF will be "1",

in another word, if the operation has no carry-out, CF will be "0".

b. Subtraction : CF as a borrow-in indicator, when the subtraction operation must has a borrow, in the CF

will be "0", in another word, if no borrow-in, CF will be "1".

c. Comparision: CF is as a borrow-in indicator for Comparision operation as the same as subtraction

operation.

d. Rotation: CF shifts into the empty bit of accumulator for the rotation and holds the shift out data after

rotation.

e. CF test instruction : For TFCFC instruction, the content of CF sends into SF then clear itself "0".

For TTSFC instruction, the content of CF sends into SF then set itself "1".

(2) Zero Flag ( ZF )

ZF is affected by the result of ALU, if the ALU operation generate a "0" result, the ZF will be "1",

otherwise, the ZF will be "0".

(3) Status Flag ( SF )

The SF is affected by instruction operation and system status .

a. SF is initiated to "1" for reset condition .

b. Branch instruction is decided by SF, when SF=1, branch condition will be satisified, otherwise,

branch condition will not be satisified by SF = 0 .

(4) General Flag ( GF )

GF is a one bit general purpose register which can be set, clear, test by instruction SGF, CGF and TGS.

PROGRAM EXAMPLE:

Check following arithematic operation for CF, ZF, SF

CF

ZF

SF

LDIA #00h;

-

1

1

LDIA #03h;

-

0

1

ADDA #05h;

-

0

1

ADDA #0Dh;

-

0

0

ADDA #0Eh;

-

0

0