DTMF RECEIVER

HM 9270C/D

- 2 -

Block Diagram (Figure 1)

Pin

Sym.

1

IN+

2

IN-

3GS

4V

REF

5

INH

6

PWDN

7

OSC1

8

OSC2

9V

SS

10

TOE

Non-Inverting input

Invering Input

Gain select. Gives access to output of front-end differential amplifier for connection of

feedback resistor.

Reference voltage output,nominally V

application diagram).

Inhibit (input) logic high inhibit the detection of 1633Hz internal built-in pull down resistor.

(HM9270D only).

Power down (input). Active high power down the device and inhibit the oscillator internal

built-in pull down resistor. (HM9270D only).

Clock Input

Clock

Output

Negative power supply, normally connected to 0V.

3-state data output enable (input). Logic high enables the outputs Q1-Q4. Internal pull-up.

Connections to the front-end differential amplifier.

Function

Pin Description

3.579545 MHz crystal connected between these pins completes

internal oscillator.

Q1

Q2

Q3

Q4

OSC1

OSC2

GS

IN

IN+

+

-

CHIP

CLOCKS

CHIP

POWER

CHIP

BIAS

CHIP

REF

DIAL

TONE

FILTER

HIGH

GROUP

FILTER

LOW

GROUP

FILTER

BIAS

CIRCUIT

+

-

ZERO

CROSSING

DETECTORS

DIGITAL

DETECTION

ALGORITHM

CODE

CONVERTER

AND

LATCH

STEERING

LOGIC

TOE

StD

V

V

REF

ESt

INH

PWDN