LM3243 datasheet(4/29 Pages) TI1

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LM3243

SNVS782B – OCTOBER 2010 – REVISED FEBRUARY 2013

www.ti.com

ELECTRICAL CHARACTERISTICS

(1) (2) (3)

Limits in standard typeface are for TA = TJ = 25°C. Limits in boldface type apply over the full operating ambient temperature

range (

−30°C ≤ TA = TJ ≤ +90°C). Unless otherwise noted, all specifications apply to the Typical System Application Diagram

(page 2) with: PVIN = VDD = EN = 3.8V, BP = 0V.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Feedback voltage at low

VCON = 0.16V, MODE = LOW

VFB, LOW

0.350

0.400

0.450

setting

(3)

Feedback voltage at high

VCON = 1.44V, VIN = 3.9V,

VFB, HIGH

3.492

3.6

3.708

setting

MODE = LOW (3)

ISHDN

Shutdown supply current

EN = SW = VCON = 0V (4)

0.02

µA

No switching (5)

Iq_PFM

DC bias current into VDD

260

310

MODE = HIGH

µA

No Switching (5)

Iq_PWM

DC bias current into VDD

975

1100

MODE = LOW

Positive transient peak current

ILIM,PFET, Transient

VCON = 0.6V (6)

1.9

2.1

limit

ILIM,PFET,Steady

Positive steady state peak

VACB = 3.05V

1.34

1.45

1.65

State

current limit

VCON = 0.6V (6)

Positive active current assist

VCON = 0.6V, VACB = 2.8V

ILIM, P_ACB

1.40

1.70

2.00

peak current limit

(6)

NFET Switch negative peak

ILIM, NFET

VCON = 1.0V (6)

−1.69

−1.50

−1.31

current limit

Average Internal oscillator

FOSC

VCON = 1.0V

2.43

2.70

2.97

MHz

frequency

VIH

Logic HIGH input threshold

BP, EN, MODE

1.2

VIL

Logic LOW input threshold

BP, EN, MODE

0.5

IEN

EN pin pulldown current

EN = 3.6V

IIN

Pin input current

BP, MODE

−1

µA

IVCON

VCON pin leakage current

VCON = 1.0V

−1

Gain

VCON to VOUT Gain

0.16V

≤ VCON ≤ 1.44V (7)

2.5

V/V

(1)

All voltages are with respect to the potential at the GND pins. The LM3243 is designed for mobile phone applications where turn-on after

power-up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal

Under Voltage Lock-Out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin LOW until the input voltage

exceeds 2.7V.

(2)

Min and Max limits are specified by design, test, or statistical analysis.

(3)

The parameters in the electrical characteristics table are tested under open loop conditions at PVIN = VDD = 3.8V. For performance

over the input voltage range and closed-loop results, refer to the datasheet curves.

(4)

Shutdown current includes leakage current of PFET.

(5)

Iq specified here is when the part is not switching. For operating input current at no load, refer to datasheet curves.

(6)

Current limit is built-in, fixed, and not adjustable.

(7)

Linearity limits are ±3% or ±50 mV, whichever is larger.

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