MB40178 datasheet(4/21 Pages) FUJITSU

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MB40168/MB40178

s PIN DESCRIPTION

*1: MB40168 (MSB: 6 pin, LSB: 42 pin), MB40178 (MSB: 42 pin, LSB: 6 pin)

*2: MB40168 (MSB: 11 pin, LSB: 3 pin), MB40178 (MSB: 3 pin, LSB: 11 pin)

Symbol

Pin No.

I/O

Name & Function

QFP-44

SH-DIP-48

VCCD

19, 28, 37

26, 36, 37, 47

—

Digital Power Supply pins (+ 5 V).

VCCA

20, 27, 36

27, 34, 35, 46

—

Analog Power Supply pins (+ 5 V).

DGND

16, 30,

39, 40

1, 24, 39

—

Digital Ground (0 V). These pins should be connected to the

analog ground on the application system.

AGND

17, 18,

29, 38

25, 38, 48

—

Analog Ground (0 V). These pins should be connected to the

analog ground on the application system.

DA8 - DA1

7 - 14

15 - 22

ADC Digital Output pins. TTL level.

ADCLK

ADC Clock Input pin. TTL level.

VRT

ADC Reference Voltage Input pin. (5 V Input)

VINC

Sync Tip Clamp Circuit Analog Input pin. (0 - 3 V, 1.95 VP-P).

When a clamp circuit is not used, this pin is connected to

ground.

VOUTC

Clamp Circuit Analog Output pin. It is used by adding a

capacitor (1

µF or more) between VCLMP and VOVTC pins.

When a clamp circuit is not used, this pin is left open.

VCLMP

Clamp Voltage Output pin (3.05V Output). When a clamp

circuit is not used, this pin is left open.

VINA

ADC Analog Signal Input pin. (3 - 5 V)

VRM

—

ADC Middle Reference Voltage Monitor pin. (Mid of VRT - VRB

is set to this pin). Normally this pin is left open.

VRB

ADC Reference Voltage Input pin. (3 V)

VREF

Reference Voltage Output pin. (Resistor Divider, 3 V)

By connecting this pin to VRB pin, 3V Voltages are generated.

When a reference voltage is not used, this pin is left open.

VRIN

DAC Reference Voltage Input pin (3 V)

COMP

—

Phase Compensation Capacitor pin. (Capacitor greater than

0.1

µF should be connected between this pin and Analog

Ground.)

AOUT

Analog Signal Output pin

DACLK

DAC Clock Input pin. TTL level.

DD9 - DD1

1 - 6 *1

42 - 44

3 - 11*2

DAC Digital Data Input pins. TTL level.

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