MB86613 datasheet(2/36 Pages) FUJITSU

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MB86613

s FEATURES

1394 serial bus controller Unit

• Compliant with IEEE 1394-1995 Standard

• PHYsical and LINK layer modules integrated on a single chip

• Three internal ports

• Transfer rates of S100, S200, and S400 supported

• On-chip PLL for generating 400-MHz (PHY) and 50-MHz (LINK) CLK signals

• Built-in cycle master function

• Bus management CSR (control and status register)

• Six-conductor cable supported

• Internal transceiver and comparator

• Internal comparator for cable power detection

Context program controller unit

• Compliant with Open HCI Standard (Draft 1.00)

• Thirteen context program controllers integrated:

•

Internal 6-KB FIFO buffers

PCI bus controller unit

• Compliant with PCI Standard (Revision 2.2)

• On-chip 32-bit DMA controller

• Built-in power management function (Compliant with PCI bus power management standard version 1.0)

• Built-in alignment function

• Built-in byte swap function

• Operating frequency of up to 33 MHz

• Internal parallel ROM interface

• Internal serial ROM interface

• Internal universal (5/3.3 V shared) PCI buffer

Physical specifications

• Package: LQFP144 (FPT-144P-M08), FBGA176 (BGA-176P-M02)

• Power-supply voltage: Dual system for 5 V (

± 5%) and 3.3 V (± 5%)

Reference standards

• IEEE Standard for a High Performance 1394-1995

• 1394 Open Host Controller Interface Specification (Release 1.00)

• PCI Specification (Revision 2.2)

• PCI Bus Power Management Interface Specification (Version 1.0)

Asynchronous Transmit DMA

…2ch •Asynchronous response

…1ch

•Asynchronous request

…1ch

Isochronous Transmit DMA

…4ch

Receive DMA

…7ch •Asynchronous response

…1ch

•Asynchronous request

…1ch

•Isochronous

…4ch

•SelfID

…1ch

Asynchronous Transmit FIFO

…1.5 Kbyte

isochronous Transmit FIFO

…1.5 Kbyte

Asynchronous/Isochronous Receive FIFO

…3.0 Kbyte

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