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COP8SCR9 Datasheet(PDF) 8 Page - Texas Instruments

Part # COP8SCR9
Description  COP8SBR9/COP8SCR9/COP8SDR9 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
PDF  105 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

COP8SCR9 Datasheet(HTML) 8 Page - Texas Instruments

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COP8SBR9, COP8SCR9, COP8SDR9
SNOS537I – JUNE 2000 – REVISED MARCH 2013
www.ti.com
2.1.3.5
ARCHITECTURE
The COP8 family is based on a modified Harvard architecture, which allows data tables to be accessed
directly from program memory. This is very important with modern microcontroller-based applications,
since program memory is usually ROM or EPROM, while data memory is usually RAM. Consequently
constant data tables need to be contained in non-volatile memory, so they are not lost when the
microcontroller is powered down. In a modified Harvard architecture, instruction fetch and memory data
transfers can be overlapped with a two stage pipeline, which allows the next instruction to be fetched from
program memory while the current instruction is being executed using data memory. This is not possible
with a Von Neumann single-address bus architecture.
The COP8 family supports a software stack scheme that allows the user to incorporate many subroutine
calls. This capability is important when using High Level Languages. With a hardware stack, the user is
limited to a small fixed number of stack levels.
2.1.3.6
INSTRUCTION SET
In today's 8-bit microcontroller application arena cost/performance, flexibility and time to market are
several of the key issues that system designers face in attempting to build well-engineered products that
compete in the marketplace. Many of these issues can be addressed through the manner in which a
microcontroller's instruction set handles processing tasks. And that's why the COP8 family offers a unique
and code-efficient instruction set - one that provides the flexibility, functionality, reduced costs and faster
time to market that today's microcontroller based products require.
Code efficiency is important because it enables designers to pack more on-chip functionality into less
program memory space (ROM, OTP or Flash). Selecting a microcontroller with less program memory size
translates into lower system costs, and the added security of knowing that more code can be packed into
the available program memory space.
2.1.3.6.1 Key Instruction Set Features
The COP8 family incorporates a unique combination of instruction set features, which provide designers
with optimum code efficiency and program memory utilization.
2.1.3.6.2 Single Byte/Single Cycle Code Execution
The efficiency is due to the fact that the majority of instructions are of the single byte variety, resulting in
minimum program space. Because compact code does not occupy a substantial amount of program
memory space, designers can integrate additional features and functionality into the microcontroller
program memory space. Also, the majority instructions executed by the device are single cycle, resulting
in minimum program execution time. In fact, 77% of the instructions are single byte single cycle, providing
greater code and I/O efficiency, and faster code execution.
2.1.3.6.3 Many Single-Byte, Multi-Function Instructions
The COP8 instruction set utilizes many single-byte, multifunction instructions. This enables a single
instruction to accomplish multiple functions, such as DRSZ, DCOR, JID, LD (Load) and X (Exchange)
instructions with post-incrementing and post-decrementing, to name just a few examples. In many cases,
the instruction set can simultaneously execute as many as three functions with the same single-byte
instruction.
JID: (Jump Indirect); Single byte instruction decodes external events and jumps to corresponding service
routines (analogous to “DO CASE” statements in higher level languages).
LAID: (Load Accumulator-Indirect); Single byte look up table instruction provides efficient data path from
the program memory to the CPU. This instruction can be used for table lookup and to read the entire
program memory for checksum calculations.
RETSK: (Return Skip); Single byte instruction allows return from subroutine and skips next instruction.
Decision to branch can be made in the subroutine itself, saving code.
8
Device Information
Copyright © 2000–2013, Texas Instruments Incorporated
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Product Folder Links: COP8SBR9 COP8SCR9 COP8SDR9



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