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COP8SCR9 Datasheet(PDF) 13 Page - Texas Instruments |
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COP8SCR9 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 105 page  COP8SBR9, COP8SCR9, COP8SDR9 www.ti.com SNOS537I – JUNE 2000 – REVISED MARCH 2013 3.4 DC Electrical Characteristics ( −40°C ≤ T A ≤ +125°C) Datasheet min/max specification limits are ensured by design, test, or statistical analysis. Parameter Conditions Min Typ Max Units Operating Voltage 4.5 5.5 V Power Supply Rise Time 10 50 x 106 ns Power Supply Ripple (1) Peak-to-Peak 0.1 VCC V Supply Current(2) High Speed Mode CKI = 10 MHz VCC = 5.5V, tC = 0.5 μs 14.5 mA CKI = 3.33 MHz VCC = 4.5V, tC = 1.5 μs 7 mA Dual Clock Mode CKI = 10 MHz, Low Speed OSC = 32 kHz VCC = 5.5V, tC = 0.5 μs 14.5 mA CKI = 3.33 MHz, Low Speed OSC = 32 kHz VCC = 4.5V, tC = 1.5 μs 7 mA Low Speed Mode Low Speed OSC = 32 kHz VCC = 5.5V 65 110 μA HALT Current with BOR Disabled(3) High Speed Mode VCC = 5.5V, CKI = 0 MHz <4 40 μA Dual Clock Mode VCC = 5.5V, CKI = 0 MHz, Low <9 50 μA Speed OSC = 32 kHz Low Speed Mode VCC = 5.5V, CKI = 0 MHz, Low <9 50 μA Speed OSC = 32 kHz Idle Current(2) High Speed Mode CKI = 10 MHz VCC = 5.5V, tC = 0.5 μs 2.7 mA Dual Clock Mode CKI = 10 MHz, Low Speed OSC = 32 kHz VCC = 5.5V, tC = 0.5 μs 2.7 mA Low Speed Mode Low Speed OSC = 32 kHz VCC = 5.5V 30 70 μA Supply Current for BOR Feature(2) VCC = 5.5V 45 μA High Brownout Trip Level (BOR Enabled) 4.17 4.28 4.5 V Input Levels (VIH, VIL) Logic High 0.8 VCC V Logic Low 0.16 VCC V Internal Bias Resistor for the CKI 0.3 1.0 2.5 M Ω Crystal/Resonator Oscillator Hi-Z Input Leakage VCC = 5.5V −3 +3 μA Input Pullup Current VCC = 5.5V, VIN = 0V −40 −250 μA Port Input Hysteresis 0.25 VCC V (1) Maximum rate of voltage change must be < 0.5 V/ms. (2) Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180° out of phase with CKI, inputs connected to VCC and outputs driven low but not connected to a load. (3) The HALT mode will stop CKI from oscillating. Measurement of IDD HALT is done with device neither sourcing nor sinking current; with L. A. B, C, E, F, G0, and G2–G5 programmed as low outputs and not driving a load; all D outputs programmed low and not driving a load; all inputs tied to VCC; A/D converter and clock monitor and BOR disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Copyright © 2000–2013, Texas Instruments Incorporated Electrical Specifications 13 Submit Documentation Feedback Product Folder Links: COP8SBR9 COP8SCR9 COP8SDR9 |
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