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WM1811A Datasheet(PDF) 176 Page - Wolfson Microelectronics plc

Part # WM1811A
Description  Multi-Channel Audio Hub CODEC for Smartphones
PDF  328 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM1811A Datasheet(HTML) 176 Page - Wolfson Microelectronics plc

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WM1811A
Production Data
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PD, November 2013, Rev 4.1
176
The GPIO9 pin supports the ADCDAT3 function, which supports the output from the AIF3 Mono PCM
interface.The source for the ADCDAT3 pin is selected using the AIF3_ADCDAT_SRC register.
When AIF3 Mono PCM output is used, the data source must be configured using the AIF3ADC_SRC
register; this selects either the Left or Right AIF2 output paths as the data source.
When AIF3 Mono PCM output is used, the AIF2 output paths must be enabled using the
AIF2ADCR_ENA and AIF2ADCL_ENA register bits. Note that, if AIF3 Mono PCM output is required
and AIF2 output is not used, then the AIF2 output can be disabled using the AIF2TXL_ENA and
AIF2TXR_ENA registers.See Table 95 for details of these registers.
The ADCDAT3 pin can also be used as an alternate data output (mono or stereo) from AIF1 or AIF2,
or can be connected to the DACDAT2 data input.
The AIF3 interface can be tri-stated by setting the AIF3_TRI register. When this bit is set, then all of
the AIF3 outputs are un-driven (high-impedance). The AIF3_TRI register only affects those pins which
are configured for AIF3 functions; it does not affect pins which are configured for other functions.
The AIF3 control registers are described in Table 102.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R6 (0006h)
Power
Management
(6)
10:9
AIF3ADC_S
RC [1:0]
00
AIF3 Mono PCM output source select
00 = None
01 = AIF2ADC (Left) output path
10 = AIF2ADC (Right) output path
11 = Reserved
8:7
AIF2DAC_S
RC [1:0]
00
AIF2 input path select
00 = Left and Right inputs from AIF2
01 = Left input from AIF2; Right input from
AIF3
10 = Left input from AIF3; Right input from
AIF2
11 = Reserved
5
AIF3_TRI
0
AIF3 Audio Interface tri-state
0 = AIF3 pins operate normally
1 = Tri-state all AIF3 interface pins
Note that pins not configured as AIF3
functions are not affected by this register.
4:3
AIF3_ADCD
AT_SRC
[1:0]
00
GPIO9/ADCDAT3 Source select
00 = AIF1 ADCDAT1
01 = AIF2 ADCDAT2
10 = DACDAT2
11 = AIF3 Mono PCM output
Note that GPIO9 must be configured as
ADCDAT3.
2
AIF2_ADCD
AT_SRC
0
ADCDAT2 Source select
0 = AIF2 ADCDAT2
1 = GPIO8/DACDAT3
For selection 1, the GPIO8 pin must also be
configured as DACDAT3.
1
AIF2_DACD
AT_SRC
0
AIF2 DACDAT Source select
0 = DACDAT2
1 = GPIO8/DACDAT3
For selection 1, the GPIO8 pin must also be
configured as DACDAT3.



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