Pad Assignment

* The IC substrate should be connected to VSS in the PCB layout artwork.

HT113JA

8

December 14, 1999

BZ

BZ

VL C D

T2 5 6

CO M 3

CO M 2

CO M 1

CO M 0

NC

NC

NC

NC

®

ST AR T / PA U S E

MU T E

¬

SE G 1 7

SE G 1 6

SE G 1 5

SE G 1 4

SE G 1 3

SE G 1 2

SE G 1 1

SE G 1 0

SE G 9

SE G 8

SE G 7

SE G 6

SE G 5

SE G 4

SE G 3

SE G 2

SE G 1

NC

ON / O F F

NC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

(0 , 0 )

SE G 0