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AT30TS74 [PRELIMINARY DATASHEET]

Atmel-8897D-DTS-AT30TS74-Datasheet_102014

to set the value of the Configuration Register. Only the first data byte sent to the AT30TS74 will be recognized

as valid data; any subsequent bytes received by the device will simply be ignored. If the Master does not send a

complete byte of Configuration Register data prior to issuing a Stop or repeated Start condition, then the

AT30TS74 will ignore the data and the contents of the Configuration Register will be unchanged.

5.3.1

OS Bit

The OS bit is used to enable the One-Shot Temperature Measurement mode. When a Logic 1 is written to the

OS bit while the AT30TS74 is in the Shutdown mode, the device will become active and perform a single

temperature measurement and conversion. After the Temperature Register has been updated with the

measured temperature data, the device will return to the low-power Shutdown mode and clear the OS bit.

Writing a one to the OS bit when the device is not in the Shutdown mode will have no affect. When reading the

Configuration Register, the OS bit will always be read as a Logic 0.

5.3.2

R1:R0 Bits

The R1 and R0 bits are used to select the conversion resolution of the internal sigma-delta ADC. Four possible

resolutions can be set to maximize for either higher resolution or faster conversion times. The R1 and R0 bits

default to the Logic 0 state after device power-up or reset to retain backwards compatibility to industry-standard

LM75-type devices.

Table 5-6.

Conversion Resolution

5.3.3

FT1:FT0 Bits

The FT1 and FT0 bits are used to set the fault tolerance queue value which defines how many consecutive

faults must occur before the ALERT pin will be activated (see Section 4.4.1, “Fault Tolerance Limits”). The FT1

and FT0 bit settings provide four different fault values as detailed in Table 5-7. After the device powers up or

resets, both the FT1 and FT0 bits will default to the Logic 0 state.

Table 5-7.

Fault Tolerance Queue

R1

R0

Conversion Resolution

Conversion Time

0

0

9 bits

0.5°C

25ms

0

1

10 bits

0.25°C

50ms

1

0

11 bits

0.125°C

100ms

1

1

12 bits

0.0625°C

200ms

NVFT1

NVFT0

Consecutive Faults Required

0

0

1

0

1

2

1

0

4

1

1

6