AT90CAN64 datasheet(28/428 Pages) ATMEL

28 / 428 page

7679H–CAN–08/08

AT90CAN32/64/128

Figure 4-4.

External Memory with Sector Select

4.5.2

Using the External Memory Interface

The interface consists of:

• AD7:0: Multiplexed low-order address bus and data bus.

• A15:8: High-order address bus (configurable number of bits).

• ALE: Address latch enable.

•RD: Read strobe.

•WR: Write strobe.

The control bits for the External Memory Interface are located in two registers, the External

Memory Control Register A – XMCRA, and the External Memory Control Register B – XMCRB.

When the XMEM interface is enabled, the XMEM interface will override the setting in the data

direction registers that corresponds to the ports dedicated to the XMEM interface. For details

about the port override, see the alternate functions in section “I/O-Ports” on page 66. The XMEM

interface will auto-detect whether an access is internal or external. If the access is external, the

XMEM interface will output address, data, and the control signals on the ports according to Fig-

ure 4-6 (this figure shows the wave forms without wait-states). When ALE goes from high-to-low,

there is a valid address on AD7:0. ALE is low during a data transfer. When the XMEM interface

is enabled, also an internal access will cause activity on address, data and ALE ports, but the

RD and WR strobes will not toggle during internal access. When the External Memory Interface

is disabled, the normal pin and data direction settings are used. Note that when the XMEM inter-

face is disabled, the address space above the internal SRAM boundary is not mapped into the

internal SRAM. Figure 4-5 illustrates how to connect an external SRAM to the AVR using an

octal latch (typically “74x573” or equivalent) which is transparent when G is high.

0x0000

ISRAM end

External Memory

(0-64K x 8)

0xFFFF

Internal memory

SRL[2..0]

SRW11

SRW10

SRW01

SRW00

Lower sector

Upper sector

XMem start

AT90CAN64 Datasheet(PDF) 28 Page - ATMEL Corporation