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STAC9704 Datasheet(PDF) 30 Page - Hynix Semiconductor

Part # STAC9704
Description  Multimedia Audio Codec for AC97
PDF  49 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

STAC9704 Datasheet(HTML) 30 Page - Hynix Semiconductor

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SigmaTel, Inc.
STAC9704/7
30
10/02/98
4.4.8
3D Control Register (Index 22h)
This register is used to control the 3D stereo enhancement function, Sigmatel Surround 3D (SS3D),
built into the AC'97 component. Note the register bits, DP1 – DP0, are used to control the separation
ratios in the 3D control. SS3D provides for a wider soundstage extending beyond the normal 2-speaker
arrangement. Note that the 3D bit in the general purpose register (20h) must be set to 1 to enable SS3D
functionality and for the bits in 22h to take effect.
Table 16: 3D Control Registers
DP1 – DP0
SEPARATION
RATIO
0 0
3 (Default)
0 1
3 (Low)
1 0
4.5 (Med.)
1 1
6 (High)
3 separation ratios are implemented as shown above. The separation ratio defines a series of equations
that determine the amount of depth difference (High, Medium, and Low) perceived during two-channel
playback. The ratios provide for options to narrow or widen the soundstage.
4.4.9
Powerdown Control/Status Register (Index 26h)
This read/write register is used to program powerdown states and monitor subsystem readiness. The
lower half of this register is read only status, a “1” indicating that the subsection is “ready”. Ready is
defined as the subsection’s ability to perform in its nominal state. When this register is written, the bit
values that come in on AC-link will have no effect on read only bits 0-7.
When the AC-link “Codec Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1, it indicates that the
AC-link and AC’97 control and status registers are in a fully operational state. The AC’97 controller
must further probe this Powerdown Control/Status Register to determine exactly which subsections, if
any are ready.



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