ICS9248-65 datasheet(5/10 Pages) ICST

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ICS9248-65

Absolute Maximum Ratings

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V

Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to VDD +0.5 V

Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are

stress specifications only and functional operation of the device at these or any other conditions above those listed in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods

may affect product reliability.

Electrical Characteristics - Input/Supply/Common Output Parameters

TA = 0 - 70º C; Supply Voltage VDD = VDDL = 3.3 V +/-5%, (unless otherwise stated)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input High Voltage

VIH

2VDD+0.3

Input Low Voltage

VIL

VSS-0.3

0.8

Input High Current

IIH

VIN = VDD

0.1

µA

Input Low Current

IIL1

VIN = 0 V; Inputs with no pull-up resistors

-5

2.0

µA

Input Low Current

IIL2

VIN = 0 V; Inputs with pull-up resistors

-200

-100

µA

IDD3.3OP100 CL = 0 pF; Select @ 100 MHz

IDD3.3OP133 CL = 0 pF; Select @ 133.3 MHz

IDD3.3OP144 CL = 0 pF; Select @ 144 MHz

IDD3.3OP154 CL = 0 pF; Select @ 154 MHz

Power Down

IDD3.3PD

CL = 0 pF; PWRDWN# = 0

200

µA

Supply Current

Input frequency

VDD = 3.3 V

14.318

MHz

Input Capacitance

CIN

Logic Inputs

CINX

X1 & X2 pins

Transition Time

Ttrans

To 1st crossing of target Freq.

Settling Time

From 1st crossing to 1% target Freq.

0.5

Clk Stabilization

TSTAB

From VDD = 3.3 V to 1% target Freq.

Skew

tCPU-PCI

VT = 1.5 V; VTL = 1.25 V

1.5

2.4

Skew

tCPU-3V66

VT = 1.5 V; VTL = 1.25 V

1.4

1.5

Skew

t3V66-PCI

VT = 1.5 V

1.4

1Guaranteed by design, not 100% tested in production.

Operating

160

Group Offset

Group

Offset

Measurement L oads

Measure Points

CPU to 3V66

0.0-1.5ns CPU leads

C PU @ 20pF, 3V66 @ 30pF

CPU @1.25V, 3V66 @ 1.5V

3V66 to PCI

1.5-4.0ns 3V66 leads

3V66 @ 30pF, PCI @ 30pF

3V66 @ 1.5V, PC I @ 1.5V

CPU to IOAPIC

1.5-4.0ns CPU leads

CPU @ 20pF, IOAPIC @ 20pF

CPU @1.25V, IOAPIC @ 1.5V

No te: 1. All offsets are to be meas ured at rising edges.

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