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28F800F3 Datasheet(PDF) 6 Page - Intel Corporation

Part # 28F800F3
Description  FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT
PDF  47 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

28F800F3 Datasheet(HTML) 6 Page - Intel Corporation

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FAST BOOT BLOCK DATASHEET
E
6
PRODUCT PREVIEW
2.0
PRODUCT DESCRIPTION
This
section describes
the pinout
and
block
architecture of the device family.
2.1
Pinouts
Intel’s
Fast
Boot
Block
flash memory
family
provides upgrade paths in each package pinout up
to the 16-Mbit density. The family is available in
µBGA CSP and 56-lead SSOP packages. Pinouts
for the 8- and 16-Mbit components are illustrated in
Figures 1 and 2.
2.2
Pin Description
The pin description table describes pin usage.
12
3456
789
A
B
C
D
E
F
10
A
14
A
15
A
12
A
11
A
8
GND
A
20
WE#
CLK
V
CC
A
19
V
PP
A
17
A
5
A
4
A
13
A
10
A
21
A
18
A
7
A
6
A
1
A
2
A
3
A
9
WP#
RST#
ADV#
V
CCQ
DQ
7
DQ
12
DQ
10
DQ
9
DQ
0
CE#
DQ
13
DQ
11
DQ
4
A
16
DQ
15
DQ
6
DQ
2
DQ
1
OE#
WAIT# GND
DQ
14
GND
V
CCQ
DQ
8
GND
A
0
DQ
5
DQ
3
V
CC
16M
32M
64M
NOTES:
1.
Shaded connections indicate upgrade address connections. Lower density devices will not have upper address solder
balls. Routing is not recommended in this area.
2.
A20 and A21 are the upgrade address for potential 32-Mbit and 64-Mbit devices (currently not on road map).
3.
Reference the
Micro Ball Grid Array Package Mechanical Specification and Media Information on Intel’s World Wide Web
home page for detailed package specifications.
Figure 1. 56-Ball µBGA* Package Pinout (Top View, Ball Down)



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