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AD7492 Datasheet(PDF) 16 Page - Analog Devices |
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AD7492 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 24 page ![]() AD7492 Rev. A | Page 16 of 24 CONVST BUSY CS RD DBx tWAKEUP tCONVERT Figure 21. Mode 2 Operation VDRIVE The VDRIVE pin is used as the voltage supply to the digital output drivers and the digital input circuitry. It is a separate supply from AVDD and DVDD. The purpose of using a separate supply for the digital input/output interface is that the user can vary the output high voltage, VOH, and the logic input levels, VINH and VINL, from the VDD supply to the AD7492. For example, if AVDD and DVDD are using a 5 V supply, the VDRIVE pin can be powered from a 3 V supply. The ADC has better dynamic performance at 5 V than at 3 V, so operating the part at 5 V, while still being able to interface to 3 V parts, pushes the AD7492 to the top bracket of high performance 12-bit ADCs. Of course, the ADC can have its VDRIVE and DVDD pins connected together and be powered from a 3 V or 5 V supply. The trigger levels are VDRIVE × 0.7 and VDRIVE × 0.3 for the digital inputs. The pins that are powered from VDRIVE are DB11 to DB0, CS, RD, CONVST, and BUSY. PS/FS PIN As previously mentioned, the PS/FS pin is used to control the type of power-down mode that the AD7492 can enter into if operated in Mode 2. This pin can be hardwired either high or low, or even controlled by another device. It is important to note that toggling the PS/FS pin while in power-down mode does not switch the part between partial sleep and full sleep modes. To switch from one sleep mode to another, the AD7492 has to be powered up and the polarity of the PS/FS pin changed. It can then be powered down to the required sleep mode. POWER-UP It is recommended that the user performs a dummy conversion after power-up, as the first conversion result could be incorrect. This also ensures that the part is in the correct mode of operation. The recommended power-up sequence is as follows: 1. GND 2. VDD 3. VDRIVE 4. Digital Inputs 5. VIN Power vs. Throughput The two modes of operation for the AD7492 produces different power vs. throughput performances, Mode 1 and Mode 2; see the Operating Modes section of the data sheet for more detailed descriptions of these modes. Mode 2 is the sleep mode (partial/full) of the part and it achieves the optimum power performance. Mode 1 Figure 22 shows the AD7492 conversion sequence in Mode 1 using a throughput rate of 500 kSPS. At 5 V supply, the current consumption for the part when converting is 3 mA and the quiescent current is 1.8 mA. The conversion time of 880 ns contributes 6.6 mW to the overall power dissipation in the following way: (880 ns/2 μs) × (5 × 3 mA) = 6.6 mW The contribution to the total power dissipated by the remaining 1.12 μs of the cycle is 5.04 mW (1.12 μs/2 μs) × (5 × 1.8 mA) = 5.04 mW Thus the power dissipated during each cycle is 6.6 mW + 5.04 mW = 11.64 mW CONVST BUSY 880ns tQUIESCENT tCONVERT 1.12µs 2µs Figure 22. Mode 1 Power Dissipation |
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