CDP1879 datasheet(3/18 Pages) INTERSIL

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4-106

RESET

AM - PM

AND

HOUR LOGIC

PRESCALE

OSCILLATOR

SECOND

XTAL

MINUTE

HOUR

DAY

MONTH

FREEZE

CIRCUIT

CALENDAR

LOGIC

PRESCALE

SELECT

CLOCK

SELECT

CONTROL

INT. STATUS

CLOCK AND

INT. LOGIC

CLOCK OUT

INT

VDD

VSS

I/O

INTERFACE

SECOND

LATCH

MINUTE

LATCH

HOUR

LATCH

COMPARATOR

DB0-DB7

TPA

I-O MEM

TPB/WR

POWER DOWN

ADDRESS DECODE

AND

CONTROL LOGIC

8-BIT DATA BUS

FIGURE 1. REAL-TIME CLOCK FUNCTIONAL DIAGRAM

TABLE 1.

CONTROL REGISTER BIT ASSIGNMENT

Bit 1, 0

Frequency 00

Select 01

32768Hz

1.048576MHz

2.097152MHz

4.194304MHz

Bit 2

Start/Stop

1 = Start

0 = Stop

Bit 3

Counter/Latch Control

“0” = Write to Counter and disable alarm

“1” = Write to and enable alarm Clock Select

Bit 7, 6, 5, 4

0000 - disable

µs

0001 - 488.2

µs

0010 - 976.5

µs

0011 - 1953.1

µs

0100 - 3906.2

µs

0101 - 7812.5

µs

0110 - 15.625ms

0111 - 31.25ms

1000 - 62.5ms

1001 - 125ms

1010 - 250ms

1011 - 500ms

1100 - sec.

1101 - min.

1110 - hour

1111 - day

TABLE 2.

ADDRESSES

Latch, Counter Seconds

Latch, Counter Minutes

Latch, Counter Hours

Counter, Day

Counter, Month

Control, Register

Status Register

MSB of Hours Counters (Bit 7) is an AM-PM Bit. 0 = AM; 1 = PM

Bit 6 of Hours Counter Controls 12/24 hr. 1 = 12 Hr: 0 = 24 Hr.

Status Register: Bit 7 MSB = Alarm

Interrupt Source: Bit 6 = Clock.

MSB of Month Counter (Bit 7) is a Leap Year Bit 0 = No, 1 = Yes.

CDP1879, CDP1879C-1

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