| Electronic Components Datasheet Search |
|
AD8362 Datasheet(PDF) 16 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8362 Datasheet(HTML) 16 Page - Analog Devices |
|
16 / 32 page ![]() AD8362 Data Sheet Rev. E | Page 16 of 32 CIRCUIT DESCRIPTION The AD8362 is a fully calibrated, high accuracy, rms-to-dc converter providing a measurement range of over 65 dB. It is capable of operating from signals as low in frequency as a few hertz to at least 3.8 GHz. Unlike earlier rms-to-dc converters, the response bandwidth is completely independent of the signal magnitude. The −3 dB point occurs at about 3.5 GHz. The capacity of this part to accurately measure waveforms having a high peak-to-rms ratio (crest factor) is independent of either the signal frequency or its absolute magnitude, over a wide range of conditions. This unique combination allows the AD8362 to be used as a calibrated RF wattmeter covering a power ratio of >1,000,000:1, a power controller in closed-loop systems, a general-purpose rms-responding voltmeter, and in many other low frequency applications. The part comprises the core elements of a high performance AGC loop (see Figure 44), laser-trimmed during manufacturing to close tolerances while fully operational at a test frequency of 100 MHz. Its linear, wideband VGA provides a general voltage gain, GSET; this can be controlled in a precisely exponential (linear- in-dB) manner over the full 68 dB range from −25 dB to +43 dB by a voltage, VSET. However, to provide adequate guardbanding, only the central 60 dB of this range, from −21 dB to +39 dB, is normally used. The Adjusting VTGT to Accommodate Signals with Very High Crest Factors section shows how this basic range can be shifted up or down. VGA INHI INLO CHPF VSET VREF 1.25V × 0.06 ACOM VTGT X2 X2 VSIG VATG CF CLPF VOUT ACOM ISQU ITGT –25dB TO +43dB GSET OFFSET NULLING SETPOINT INTERFACE INTERNAL RESISTORS SET BUFFER GAIN TO 5 AMPLITUDE TARGET FOR VSIG MATCH WIDE- BAND SQUARERS OUTPUT FILTER BAND GAP REFERENCE CLPF EXTERNAL Figure 44. Basic Structure of the AD8362 The VGA gain has the form GSET = GO exp(−VSET/VGNS) (2) where: GO is a basic fixed gain. VGNS is a scaling voltage that defines the gain slope (the dB change per volt). Note that the gain decreases with VSET. The VGA output is VSIG = GSETVIN = GOVIN exp(VSET/VGNS) (3) where VIN is the ac voltage applied to the input terminals of the AD8362. As explained in the Recommended Input Coupling section, the input drive can either be single-sided or differential, although dynamic range is maximized with a differential input drive. The effect of high frequency imbalances when using a single-sided drive is less apparent at low frequencies (from 50 Hz to 500 MHz), but the peak input voltage capacity is always halved relative to differential operation. SQUARE LAW DETECTION The output of the variable gain amplifier (VSIG) is applied to a wideband square law detector, which provides a true rms response to this alternating signal that is essentially independent of waveform. Its output is a fluctuating current (ISQU) that has a positive mean value. This current is integrated by an on-chip capacitance (CF), which is usually augmented by an external capacitance (CLPF) to extend the averaging time. The resulting voltage is buffered by a gain of 5, dc-coupled amplifier whose rail-to-rail output (VOUT) can be used for either measurement or control purposes. In most applications, the AGC loop is closed via the setpoint interface pin, VSET, to which the VGA gain control voltage on VOUT is applied. In measurement modes, the closure is direct and local by a simple connection from the output of the VOUT pin to the VSET pin. In controller modes, the feedback path is around some larger system, but the operation is the same. The fluctuating current (ISQU) is balanced against a fixed setpoint target current (ITGT) using current mode subtraction. With the exact integration provided by the capacitor(s), the AGC loop equilibrates when MEAN(ISQU) = ITGT (4) The current, ITGT, is provided by a second-reference squaring cell whose input is the amplitude-target voltage VATG. This is a fraction of the voltage VTGT applied to a special interface, which accepts this input at the VTGT pin. Because the two squaring cells are electrically identical and are carefully imple- mented in the IC, process and temperature-dependent variations in the detailed behavior of the two square-law functions cancel. Accordingly, VTGT (and its fractional part VATG) determines the output that must be provided by the VGA for the AGC |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |