AD8362 datasheet(21/32 Pages) AD

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Data Sheet

AD8362

Rev. E | Page 21 of 32

CHOOSING A VALUE FOR CHPF

The 3.5 GHz VGA of the AD8362 includes an offset cancel-

lation loop, which introduces a high-pass filter effect in its

transfer function. To properly measure the amplitude of the

input signal, the corner frequency (fHP) of this filter must be

well below that of the lowest input signal in the desired

measurement bandwidth frequency. The required value

of the external capacitor is given by

CHPF = 1/(2π × 800 × fHP)

(13)

For operation at frequencies as low as 100 kHz, set fHP to

approximately 25 kHz (CHPF = 8 nF). For frequencies above

approximately 2 MHz, no external capacitance is required

because there is adequate internal capacitance on this node.

CHOOSING A VALUE FOR CLPF

In the standard connections for the measurement mode, the

VSET pin is tied to VOUT. For small changes in input ampli-

tude such as a few decibels, the time-domain response of this

loop is essentially linear with a 3 dB low-pass corner frequency

of nominally fLP = 1/(2π × CLPF × 1100). Internal time delays

around this local loop set the minimum recommended value

of this capacitor to about 300 pF, making fLP = 500 kHz.

For operation at lower signal frequencies, or whenever the

averaging time needs to be longer, use

CLPF = 1/(2π × fLP × 1100)

(14)

When the input signal exhibits large crest factors, such as a

CDMA or W-CDMA signal, CLPF must be much larger than

might seem necessary. This is due to the presence of significant

low frequency components in the complex, pseudorandom

modulation, which generates fluctuations in the output of the

AD8362. Increasing CLPF also increases the step response of

the AD8362 to a change at its input.

Table 4 shows recommended values of CLPF for popular

modulation schemes. In each case, CLPF is increased until

residual output noise falls below 50 mV. A 10% to 90% step

response to an input step is also listed. Where the increased

response time is unacceptably high, CLPF must be reduced.

If the output of the AD8362 is sampled by an ADC, averaging

in the digital domain can further reduce the residual noise.

Figure 52 shows how residual ripple and rise/fall time vary with

filter capacitance when the AD8362 is driven by a single carrier

W-CDMA signal (Test Model 1-64) at 2140 MHz.

FILTER CAPACITANCE (µF)

170

180

160

150

140

130

120

110

100

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

RESIDUAL RIPPLE (mV p-p)

RISE TIME (ms)

FALL TIME (ms)

Figure 52. Residual Ripple, Rise and Fall Time vs. Filter Capacitance,

Single Carrier W-CDMA Input Signal, Test Model 1-64

Table 4. Recommended CLPF Values for Various Modulation Schemes

Modulation Scheme/Standard

Crest Factor

CLPF

Residual Ripple

Response Time (Rise/Fall)

10% to 90%

W-CDMA , Single-Carrier, Test Model 1-64

12.0 dB

0.1 µF

28 mV p-p

171 µs/1.57 ms

W-CDMA 4-Carrier, Test Model 1-64

11.0 dB

0.1 µF

20 mV p-p

162 µs/1.55 ms

CDMA2000, Single-Carrier, 9CH Test Model

9.1 dB

0.1 µF

38 mV p-p

179 µs /1.55 ms

CDMA2000, 3-Carrier, 9CH Test Model

11.0 dB

0.1 µF

29 mV p-p

171 µs/1.55 ms

WiMAX 802.16 (64QAM, 256 Subcarriers, 10 MHz Bandwidth)

14.0 dB

0.1 µF

30 mV p-p

157 µs/1.47 ms

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