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HIP5061 Datasheet(PDF) 2 Page - Intersil Corporation |
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HIP5061 Datasheet(HTML) 2 Page - Intersil Corporation |
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2 / 20 page ![]() 7-54 Specifications HIP5061 Absolute Maximum Ratings (Note 1) Thermal Information DC Supply Voltage, VDD. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V DC Supply Current, IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105mA DMOS Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 60V Average DMOS Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A DMOS Source Voltage, VSOURCE, TAB . . . . . . . . . . . . -0.1V to 0.1V DC Supply Voltage, VG. . . . . . . . . . . . . . . . . . . .-0.3V to VDD + 0.3V Compensation Pin Current, IVC . . . . . . . . . . . . . . . . . -5mA to 35mA Voltage at All Other Pins. . . . . . . . . . . . . . . . . . .-0.3V to VDD + 0.3V Operating Junction Temperature Range. . . . . . . . . . . 0oC to +105oC Storage Temperature Range . . . . . . . . . . . . . . . . . -55oC to +150oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2 - 2KV Single Pulse Avalanche Energy Rating, µs (Note 2) . . . EAS 100mJ Thermal Resistance θ JC Plastic SIP Package . . . . . . . . . . . . . . . . . . . . . . . . 2oC/W Maximum Package Power Dissipation at +85oC (Depends Upon Mounting, Heat Sink and Application) . . . . . 10W Max. Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . +105oC (Controlled By Thermal Shutdown Circuit) Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications VDD = VG =12V, VC = 5V, VFB = 5.1V, SOURCE = GND = DRAIN = 0V, TJ = 0 oC to +105oC, Unless Otherwise Specified SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS DEVICE PARAMETERS IDD Quiescent Supply Current VDD = VG = 13.2V, VC = 0V, VFB = 4V 612 18 mA IDD Operating Supply Current VDD = VG = 13.2V, VC = 8.5V, VFB = 4V - 24 31 mA IVG Quiescent Current to Gate Driver VDD = VG = 13.2V, VC = 0V - 0 10 µA IVG Operating Current to Gate Driver VC = 3V - 1 2 mA VDDC Clamp Voltage IDD = 100mA 13.3 14 15 V VREF Reference Voltage IVC = 0µA, VC = VFB 5.0 5.1 5.2 V AMPLIFIERS |IFB| Input Current VFB = VREF - -0.85 0.5 µA gm (VFB)VFB Transconductance IVC/(VFB - VREF) /IVC / = 500µA, Note 3 20 30 43 mS IVCMAX Maximum Source Current VFB = 4.6V -4 -1.8 -1 mA IVCMAX Maximum Sink Current VFB = 5.6V 1 1.8 4 mA AOL Voltage Gain /IVC / = 500µA, Note 3 44 50 - dB VCMAX Short Circuit Recovery Compara- tor Rising Threshold Voltage 5.4 6.6 8.9 V VCHYS Short Circuit Recovery Comparator Hysteresis Voltage 0.7 1.1 1.8 V IVCOVER VC Over-Voltage Current VDD = VG = 10.8V, VC = VCMAX 010 25 mA CLOCK fq Internal Clock Frequency 210 250 290 kHz DMOS TRANSISTOR rDS(ON) Drain-Source On-State Resistance IDRAIN = 5A, VDD = VG = 10.8V TJ = +25 oC - 0.15 0.22 Ω rDS(ON) Drain-Source On-State Resistance IDRAIN = 5A, VDD = VG = 10.8V TJ = +105 oC - - 0.33 Ω IDSS Drain-Source Leakage Current VDRAIN = 60V - 0.5 10 µA IDSH Average Drain Short Circuit Current VDRAIN = 5V, Note 4 - - 5 A CDRAIN DRAIN Capacitance Note 4 - 200 - pF |
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