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ACE25C800G Datasheet(PDF) 7 Page - ACE Technology Co., LTD. |
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ACE25C800G Datasheet(HTML) 7 Page - ACE Technology Co., LTD. |
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7 / 37 page ![]() ACE25C800G Uniform SECTOR Dual and Quad Serial Flash VER 1.6 7 Table1.1 ACE25C800G Protected area size (CMP=1) Status Register Content Memory Content SEC TB BP2 BP1 BP0 Blocks Addresses Density Portion X X 0 0 0 0 to 15 000000H-1FFFFFH 1M ALL 0 0 0 0 1 0 to 14 000000H-0EFFFFH 960KB Lower 15/16 0 0 0 1 0 0 to 13 000000H-0DFFFFH 896KB Lower 17/8 0 0 0 1 1 0 to 11 000000H-1BFFFFH 768KB Lower 3/4 0 0 1 0 0 0 to 7 000000H-07FFFFH 512KB Lower 1/2 0 1 0 0 1 1 to 15 010000H-0FFFFFH 960KB Upper 15/16 0 1 0 1 0 2 to 15 020000H-0FFFFFH 896KB Upper 7/8 0 1 0 1 1 4 to 15 040000H-0FFFFFH 768KB Upper 3/4 0 1 1 0 0 8 to 15 080000H-0FFFFFH 512KB Upper 1/2 0 X 1 0 1 NONE NONE NONE NONE X X 1 1 X NONE NONE NONE NONE 1 0 0 0 1 0 to 15 000000H-0FEFFFH 1020KB L-255/256 1 0 0 1 0 0 to 15 000000H-0FDFFFH 1016KB L-127/128 1 0 0 1 1 0 to 15 000000H-0FBFFFH 1008KB L-63/64 1 0 1 0 X 0 to 15 000000H-0F7FFFH 992KB L-31/32 1 1 0 0 1 0 to 15 001000H-0FFFFFH 1020KB U-255/256 1 1 0 1 0 0 to 15 002000H-0FFFFFH 1016KB U-127/128 1 1 0 1 1 0 to 15 004000H-0FFFFFH 1008KB U-63/64 1 1 1 0 X 0 to 15 008000H-0FFFFFH 992KB U-31/32 Status Register S15 S14 S13 S12 S11 S10 S9 S8 SUS CMP LB3 LB2 LB1 Reserved QE SRP1 S7 S6 S5 S4 S3 S2 S1 S0 SRP0 SEC TB BP2 BP1 BP0 WEL W1P The status and control bits of the Status Register are as follows: WIP bit The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status register progress. When WIP bit sets to 1, means the device is busy in program/erase/write status register progress, when WIP bit sets 0, means the device is not in program/erase/write status register progress. |
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