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UPD16835 Datasheet(PDF) 21 Page - NEC

Part # UPD16835
Description  MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT
PDF  32 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD16835 Datasheet(HTML) 21 Page - NEC

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µPD16835
21
(2) Standard data input
<First byte>
The first byte specifies the type of data and whether the EXP pin output is used, such as when the initial data
is input.
Table 7. First Byte Data Configuration
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Data
1
1
1
0
0 or 1 0 or 1 0 or 1 0 or 1
The EXP pin goes low (current sink) when the input data is “0”, and high (high-impedance state) when the input
data is “1”. Input “0” to bit D4.
<Second byte>
The second byte specifies the rotation direction of the
α channel, enables output of the α channel, and the number
of pulses (252 pulses MAX.) during the 1VD period (in 1 cycle of FF2) of the
α channel.
Bit D7 is used to specify the rotation direction. The rotation is in the forward direction (CW mode) when this bit
is “0”; it is in the reverse direction (CCW mode) when the bit is “1”.
Bit D6 is used to enable the output of the
α channel. The α channel enters the high-impedance state when this
bit is “0”; it is in conduction mode when the bit is “1”.
The number of pulses is set by bits D0 to D5. It is set by 6 bits in terms of software. However, the actual circuit
uses an 8-bit counter with the low-order two bits fixed to “0”. Therefore, the number of pulses that is actually
generated during start-up wait time + start-up drive wait (FF2) cycle is the number of pulses input
× 4. The number
of pulses can be set to a value in the range of 0 to 252, in units of four pulses.
Table 8. Second Byte Data Configuration (Standard data)
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Data
0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1
Rotation direction
ENABLE
Number of pulses



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