AN3077 datasheet(11/82 Pages) STMICROELECTRONICS

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AN3077

General information

–

FCCU configured as “slow switching mode”: an indication delay could occur.

The maximum delay is equal to period of the error out signal. This parameter

shall be configured equal to its minimum which is 128 µs.

–

Bi-stable protocol: indication delay is maximum 64 µs. As soon as the FCCU

receives a fault signal, it reports the failure to the outside world via output pin

(FCCU_F[0:1], if properly configured).

If the configured reaction to a fault is an interrupt, an additional delay (interrupt latency) can

occur until the interrupt handler is able to start executing (for example, higher priority IRQs,

XBAR contention, register saving, and so on).

General failure rate, or the Failure Modes, Effects and Diagnostic Analysis (FMEDA) report,

is available upon request when covered by an NDA (contact your ST representative).

2.4

Error handling

Error handling can be split into two categories:

●

Handling of errors during runtime

●

Handling of errors during boot time (for example, Logic Built-In Self-Test (LBIST),

Memory Built-In Self-Test (MBIST))

Mandatory: Runtime errors shall be handled in a time shorter than the FTTI.

Mandatory: Boot time failures shall be handled before the safety function starts.

Note:

Implementation hint: To satisfy this requirement regarding the LBIST/MIBST, Self-Test

Control Unit (STCU) status condition shall be checked by application software before safety

application starts (See “Integrity SW Operations” section of the “Self-Test Control Unit

(STCU)” chapter in the Device_Number Reference Manual for details).

2.5

Sphere of Replication

Sphere of Replication (SoR) is used for duplicating of critical components on the

Device_Number. The following modules are included in the SoR:

●

e200z4 Cores

●

Enhanced Direct Memory Access (eDMA)

●

Interrupt Controller (INTC)

●

Crossbar Switch (XBAR)

●

Memory Protection Unit (MPU)

●

Flash memory controller

●

Static RAM Controller (SRAMC)

●

System Timer Module (STM)

●

Software Watchdog Timer (WDT)

●

Peripheral Bridge (PBRIDGE)

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