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UPD17717GC Datasheet(PDF) 39 Page - NEC |
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UPD17717GC Datasheet(HTML) 39 Page - NEC |
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39 / 408 page  39 µPD17717, 17718, 17719 Figure 4-2. Configuration of Data Memory (2/2) (b) µPD17717, 17718 Note An identical system register exists. Cautions 1. The µPD17717 and 17718 do not have BANKs 10 through 14. 2. Nothing is allocated to addresses 00H through 5FH of BANK15. System registers BANK0 Data memory 0 1 2 3 4 5 6 7 0 BANK1 Column address 01 0 1 2 3 4 5 6 7 General registers System registers (SYSREG)Note Example Address 51H of BANK 0 b3 b2 b1 b0 0 1 2 3 4 5 6 7 Port register System registers (SYSREG)Note 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 System registers (SYSREG)Note System registers (SYSREG)Note 123456789 A B C D E F BANK2 BANK9 BANK15 23456789 A B C DE F Data buffer 0123456789 A B C DE F 0123456789 A B C DE F Column address Fixed to 0 0123456789 A B C DE F BANK0 Column address BANK1-BANK3 Column address BANK4-BANK9 Column address BANK15 Port register Fixed to 0 Port input/output selection registers Nothing is allocated |
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