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UPD17717GC Datasheet(PDF) 75 Page - NEC |
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UPD17717GC Datasheet(HTML) 75 Page - NEC |
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75 / 408 page  75 µPD17717, 17718, 17719 Table 8-1. Peripheral Hardware Control Functions of Control Registers (8/8) Peripheral Control Register Peripheral Hardware Control Function At Reset Clock Hardware Name Address Read/ Function Set value Power- WDT CE Stop Write Symbol ON & SP reset 01 reset reset IF IF counter 22H R/W IFCMD1 Sets IF counter mode 0000 counter mode selection IFCMD0 IFCCK1 Sets IF counter gate time and IFCCK0 FCG count frequency IF counter 23H W 0 Fixed to “0” 0000 control 0 IFCSTRT Starts or stops IF counter Nothing affected Starts counter IFCRES Resets IF counter data Nothing affected Starts counter A/D A/D converter 24H R/W 0 Fixed to “0” 0 0 Retained Retained converter channel ADCCH2 Selects pin used for A/D converter selection ADCCH1 ADCCH0 A/D converter 25H R/W 0 Fixed to “0” 0000 mode selection ADCMD Selects comparison mode of Software mode Hardware mode Retained Retained A/D converter R ADCSTT Detects operating status of Conversion ends Converting 0 0 A/D converter ADCCMP Detects comparison result of VADCREF > VADCIN VADCREF < VADCIN 0 Retained A/D converter D/A PWM clock 26H R/W 0 Fixed to “0” 0 0 Retained 0 converter selection PWMBIT Selects number of bits of PWM 8 bits 9 bits counter 0 Fixed to “0” PWMCK Selects output clock of timer 3 4.4 kHz (8)/ 440 Hz (8)/ 2.2 kHz (9) 220 Hz (9) PWM/general- 27H R/W 0 Fixed to “0” 0 0 Retained 0 purpose port pin PWM2SEL Selects function of P1B2/PWM2 pin General-purpose D/A converter function selection PWM1SEL Selects function of P1B1/PWM1 pin output port PWM0SEL Selects function of P1B0/PWM0 pin 0011 FCG AMIFC FMIFC AMIFC2 0101 0 011 1ms, 4 ms, 8 ms, Open, 1 kHz 100 kHz 900 kHz Setting prohibited 0 101 0: A/D converter not used 1: P0D0/AD0 pin 2: P0D1/AD1pin 3: P0D2/AD2 pin 4: P0D3/AD3 pin 5: P1C2/AD4 pin 6: P1C3/AD5 pin 7: Setting prohibited b3 b2 b1 b0 |
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