DocID10973 Rev 2

5/25

AN2067

Block diagram

25

V to their nominal values at startup, and the restart duty cycle in overload or short-circuit

condition. A typical value of 10% is generally set for this last parameter, as it insures that the

output diodes and the transformer don't overheat. The other parameters can be found in the

datasheet of the device. As the VDD capacitor has to respect two conditions, the maximum

value defines its value.

1.2

Standby operation

On the opposite load configuration, the converter is lightly loaded and the COMP voltage

decreases until the shutdown threshold is reached at typically 0.5 V. At this point, the

switching is disabled and energy doesn’t pass to secondary side. So, the output voltage

decreases and the regulation loop rises again above the shutdown threshold, thus the

normal switching operation is resumed. A burst mode with pulse skipping takes place, as

long as the output power is below the one corresponding to the minimum turn-on of the

device. As the COMP voltage works at 0.5 V, the peak drain current is very low (it is defined

by the minimum turn-on time of the device, and by the primary winding of the transformer)

and no audible noise is generated.

the blanking time increases till 400 ns, whereas it is 150 ns for higher voltages. The

minimum turn-on time, resulting from these values, is respectively 600 ns and 350 ns, when

the internal propagation time is taken into account. This feature brings the following benefits:

–

This change induces the hysteresis between the normal operation and burst mode

which is reached when the output power decreases.

–

A short value in normal operation assures a good drain current control in case of

short-circuit on secondary side.

–

A long value in standby operation reinforces the burst mode by skipping the

switching cycles, thus decreasing the switching losses.

Further details regarding the standby operation can be found in the datasheet.

C

OVL

12.5

10

6

–

T

SS

⋅

×

>

C

VDD

810

4

1

D

RST

--------------

1

–



⋅

V

DDhyst

-----------------------------------

⋅⋅

×

>

C

VDD

I

DD1

t

SS

⋅

V

DDhyst

------------------------





>