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AN3308 Datasheet(PDF) 48 Page - STMicroelectronics

Part # AN3308
Description  This document describes the low-voltage 3-axis digital output linear MEMS accelerometer provided in an LGA package
PDF  52 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN3308 Datasheet(HTML) 48 Page - STMicroelectronics

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First in first out (FIFO) buffer
AN3308
48/52
Doc ID 18198 Rev 1
9.4
Watermark
Watermark is a configurable flag that can be used to generate specific interrupt in order to
know when the FIFO buffer contains at least the number of samples defined as the
watermark level. The user can select the desired level in a range from 0 to 31 using the
FTH[4:0] field in the FIFO control register while the FIFO source register FSS[4:0] always
contains the number of samples stored in FIFO.
If FSS[4:0] is greater than FTH[4:0], the WTM bit is set high in the FIFO source register, on
the contrary, WTM is driven low when the FSS[4:0] field becomes lower than FTH[4:0].
FSS[4:0] increases by one step at the ODR frequency and decreases by one step every
time that a sample set reading is performed by the user.
Figure 30.
Watermark behavior - FTH[4:0] = 10
In Figure 30, the first row indicates the FSS[4:0] value, the second row indicates the relative
FIFO slot and last row shows the incremental FIFO data. Assuming FTH[4:0] = 10, the WTM
flag changes from “0” to “1” when the eleventh FIFO slot is filled (F10). Figure 31 shows that
the WTM flag goes down when the FIFO content is less than FTH[4:0], it means that nine
unread sample sets remain in FIFO.
The watermark flag (WTM) can be enabled to generate a dedicated interrupt on the INT1
pin by setting the I1_WTM bit high in CTRL_REG3.
9.5
Retrieve data from FIFO
When FIFO is enabled and the mode is different to bypass, reading output registers (28h to
2Dh) return the oldest FIFO sample set.
Whenever output registers are read, their content is moved to the SPI/I2C output buffer.
FIFO slots are ideally shifted up one level in order to release room for a new sample
reception and output registers load the current oldest value stored in the FIFO buffer.
The whole FIFO content is retrieved performing thirty two read operations from
accelerometer output registers, every other reading operation returns the same last value
until a new sample set is available in the FIFO buffer.



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