LT1016 datasheet(3/20 Pages) LINER

3 / 20 page

LT1016

1016fc

elecTrical characTerisTics The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 5V, VOUT (Q) = 1.4V, VLATCH = 0V, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

LT1016C/I

UNITS

MIN

TYP

MAX

VOS

Input Offset Voltage

RS ≤ 100Ω (Note 2)

●

1.0

±3

3.5

∆VOS/∆T

Input Offset Voltage Drift

●

µV/°C

IOS

Input Offset Current

(Note 2)

●

0.3

1.0

1.3

µA

Input Bias Current

(Note 3)

●

µA

Input Voltage Range

(Note 6)

Single 5V Supply

●

–3.75

1.25

3.5

CMRR

Common Mode Rejection

–3.75V ≤ VCM ≤ 3.5V

●

PSRR

Supply Voltage Rejection

Positive Supply 4.6V ≤ V+ ≤ 5.4V

LT1016C

●

Positive Supply 4.6V ≤ V+ ≤ 5.4V

LT1016I

●

Negative Supply 2V ≤ V– ≤ 7V

●

100

Small-Signal Voltage Gain

1V ≤ VOUT ≤ 2V

1400

3000

V/V

VOH

Output High Voltage

V+ ≥ 4.6V

IOUT =1mA

IOUT = 10mA

●

2.7

2.4

3.4

3.0

VOL

Output Low Voltage

ISINK = 4mA

ISINK = 10mA

●

0.3

0.4

0.5

I+

Positive Supply Current

●

I–

Negative Supply Current

●

VIH

LATCH Pin Hi Input Voltage

●

2.0

VIL

LATCH Pin Lo Input Voltage

●

0.8

IIL

LATCH Pin Current

VLATCH = 0V

●

500

µA

tPD

Propagation Delay (Note 4)

∆VIN = 100mV, OD = 5mV

●

∆VIN = 100mV, OD = 20mV

●

∆tPD

Differential Propagation Delay

(Note 4) ∆VIN = 100mV,

OD = 5mV

Latch Setup Time

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: Input offset voltage is defined as the average of the two voltages

measured by forcing first one output, then the other to 1.4V. Input offset

current is defined in the same way.

Note 3: Input bias current (IB) is defined as the average of the two input

currents.

Note 4: tPD and ∆tPD cannot be measured in automatic handling equipment

with low values of overdrive. The LT1016 is sample tested with a 1V step

and 500mV overdrive. Correlation tests have shown that tPD and ∆tPD

limits shown can be guaranteed with this test if additional DC tests are

performed to guarantee that all internal bias conditions are correct. For low

overdrive conditions VOS is added to overdrive. Differential propogation

delay is defined as: ∆tPD = tPDLH – tPDHL

Note 5: Electrical specifications apply only up to 5.4V.

Note 6: Input voltage range is guaranteed in part by CMRR testing and

in part by design and characterization. See text for discussion of input

voltage range for supplies other than ±5V or 5V.

Note 7: This parameter is guaranteed to meet specified performance

through design and characterization. It has not been tested.

LT1016 Datasheet(PDF) 3 Page - Linear Technology

LT1016 Datasheet(HTML) 3 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL