8

LTC1344

and B to ground C must be 150

Ω ±15Ω. For the generator

termination, switches S1 and S2 are both on and the top

side of the center resistor is brought out to a pin so it can

be bypassed with an external capacitor to reduce common

mode noise as shown in Figure 12.

Any mismatch in the driver rise and fall times or skew in

the driver propagation delays will force current through

the center termination resistor to ground causing a high

frequency common mode spike on the A and B terminals.

The common mode spike can cause EMI problems that are

reduced by capacitor C1 which shunts much of the com-

mon mode energy to ground rather than down the cable.

The LATCH Pin

The LATCH pin (21) allows the select lines (M0, M1, M2

and DCE/DTE) to be shared with multiple LTC1344s, each

with its own LATCH signal. When the LATCH pin is held

low the select line input buffers are transparent. When the

LATCH pin is pulled high, the select line input buffers latch

the state of the Select pins so that changes on the select

lines are ignored until LATCH is pulled low again. If the

latch feature is not used, the LATCH pin should be tied to

ground.

A

CABLE

TERMINATION

LOAD

GENERATOR

BALANCED

INTERCONNECTING

CABLE

RECEIVER

A

'

50

Ω

50

Ω

125

Ω

B

C

B

'

C

'

1344 F10

125

Ω

50

Ω

50

Ω

Figure 10. Typical V.35 Interface

Z

Z

Z

S1

ON

S2

ON

124

Ω

LTC1344

V.35

RECEIVER

A

B

C

1344 F11

51.5

Ω

51.5

Ω

–3V

3V

12V

–7V

–0.8mA

1mA

Figure 11. V.35 Receiver Using the LTC1344

low side. However, all of Linear Technology’s V.35 receiv-

ers meet the RS485 input impedance specification as

shown in Figure 11, which insures compliance with the

V.35 specification when used with the LTC1344.

The generator differential impedance must be 50

Ω to

150

Ω and the impedance between shorted terminals A

S1

ON

S2

ON

124

Ω

LTC1344

V.35

DRIVER

A

B

C

1344 F12

51.5

Ω

51.5

Ω

C1

100pF

Figure 12. V.35 Driver Using the LTC1344