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UPD6600AGS Datasheet(PDF) 17 Page - NEC |
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UPD6600AGS Datasheet(HTML) 17 Page - NEC |
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17 / 36 page ![]() µPD6124A, 6600A 17 16. LOW-VOLTAGE DETECTOR (RESET) CIRCUIT The µPD6124A and 6600A are internally provided with the low-voltage detector (reset) circuit, in order to prevent program hang-up. When VDD goes down to 1 V or below, an internal reset signal is generated. In the reset condition, a low level is output to the S-OUT pin. Reset circuit Internal reset signal AC pin To S-OUT pin Caution The low-voltage detector circuit starts operating at a voltage ranging from 1 to 2.2 V. Hence, if the supply voltage is 2 V or lower, the program counter may hang up before the low-voltage detector circuit operates. 17. MASK OPTIONS (PLA DATA) The following items can be selected by mask option selection: • Provide/not provide KI, S-IN pin pull-down resistor • Carrier duty selection (1/2, 1/3) at fOSC/12 • Hang-up detection specification Mask option data should be registered at the object code end. BIT ASSIGNMENT BY SWITCH SELECTION 0 1 2 7 K 0 K ALL 6 K 0 HALT S-IN 5 K 0 HALT K 4 K Duty selection HALT K Note I3 I2 I1 I0 I I/O I/O 3 0 2 0 1 S-IN pull-down resistor 0 0 MSB LSB KI pull-down resistor Corresponding Portion Hang-up detection Duty S-IN 0 0 Note The setting (bit) positions differ from the µPD6125A and 6126A. |
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