TIMING CHART 1

•

When Pin 1 is Low or Open (serial input)

4.5 clocks

LSB

CLK

SI

LRCK

LRCK

L.OUT

R.OUT

16

1

2

3

4

5

6789 10 11 12 13 14 15 16

MSB

LSB

N

Note

N

1

2

3

4

5

6789 10 11

MSB

(R-ch)

(R-ch)

(L-ch)

(L-ch)

N – 1

N – 1

Analog output update

Note When the LRCK signal is High, set the LRSEL pin to Low to input L-ch data. When the LRCK signal is Low, set the LRSEL pin to High to input L-ch data.

CLK

SI

CLK

LRCK