AN2400

Audio reproduction flow

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The microcontroller initiates the communication when it selects the Flash and starts reading

the data on a full duplex, synchronous basis. Once the microcontroller reads the data, it

generates a train of pulses using the PWM feature of the 12-bit auto reload timer. This is

explained with the help of an example:

Audio samples of 8 kHz, 8-bit format are to be reproduced. This data is coded in an 8-

bit format (with values from 0 to 255).

To reproduce the audio with sampling rate of 8 kHz, the microcontroller outputs each

value in every 1/8000 sec (every 125 µs). This means that the period of the PWM is set

at 125µs.

If the coded value of the audio signal is “1”, the microcontroller needs to generate the

PWM signal with a HIGH output for 1 count and LOW for the rest of the 255 counts.

This is shown in the figure below:

Figure 6.

Waveform depicting the microcontroller output

Figure 7 below shows how the duty cycle register generates this output.

This process uses a duty cycle register, a 12-bit auto reload register and an up-counter.

When an up-counter overflow occurs (OVF event), the ATR value is loaded into the up-

counter, the preloaded duty cycle is transferred to the duty cycle register. The PWM0 signal

is then set to a high level. Finally, when the upcounter matches the DCRx value, the PWM0

signal is set to a low level.

To use this sequence for audio generation, the following steps are taken:

1.

When the up-counter reaches 0xFFF, an overflow event occurs. At this point, the PWM

output becomes high.

2.

The ATR register value is loaded into the up-counter which in this example is 0xF00.

0xF00 is selected to maintain a range of 0-FF i.e. 0xF00-0xFFF for an 8-bit resolution

.wav file.

3.

The DCR lower 8-bit register (DCR0L) is loaded with a value that the microcontroller

has read from the serial Flash. The DCR0H register value remains 0x0F. In this

1

x

256

256

256

256

Varying duty cycles

BIN

1

x

Data value of 1 is read from Flash and ART generates

a PWM pulse with a duty cycle high of length 1

Data value of x is read from Flash and ART generates

a PWM pulse with a duty cycle high of length x

255

(256 - x)

and (256-x) low.

with 255 low.

Flash