AN2834 datasheet(36/45 Pages) STMICROELECTRONICS

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How to get the best ADC accuracy

AN2834

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DocID15067 Rev 2

3.4.2

Explanation of the behavior

The explanation of this added pin noise and added measurement error (in case a signal

source with high internal impedance is used) comes from the internal ADC structure: its

input sampling circuit.

Figure 33 shows a simplified schematic of the input stage (sample and hold circuit).

Figure 33. ADC simplified schematic of input stage - sample and hold circuit

The spikes (noise) present on ADC input pin during conversions are related to the sampling

switch (S1). If the switch is closed, some charge (coming from the sample and hold

capacitor Csh or caused by another effect) is transferred to the input pin. Then this charge

starts discharging through the source impedance (Rin). The discharge process ends at the

end of the sampling time (tS) when the switch S1 is opened. The remaining undischarged

voltage remains on the capacitor Csh and ADC measures this voltage. If the sampling time

(tS) is too short, the remaining voltage does not drop under 0.5 lsb and ADC measurement

shows an added error. Figure 34 shows this process.

Figure 34. ADC input pin noise spikes from internal charge during sampling process

Note that a non-zero external capacitance Cext (parasitic pin capacitance) also exists, so

during conversion time the pin capacitance is discharged through source impedance Rin.

ADC input

Csh

ai17905

Sampling time (t

Discharging time

Conversion time

(tC)

ai17906

AN2834 Datasheet(PDF) 36 Page - STMicroelectronics