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AN3168 Datasheet(PDF) 11 Page - STMicroelectronics |
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AN3168 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 20 page ![]() AN3168 Triggering circuits Doc ID 17193 Rev 1 11/20 4. T Triac switches off when its current reaches zero. Then the mains voltage is applied back between A1 and A2. So Capacitor C is then recharged in negative bias. This will go on until the negative diac VBO is reached. 5. Triac T is switched on as explained on point 2 but here in Q3 (current sunk from the gate and negative VA2-A1 voltage). This means that ACS can not be triggered by such circuits as they need that their gate current is always sunk from the gate (i.e. only Q2 and Q3 triggering is possible). The main point to check with Diac-based circuits is that the gate current pulse width lasts enough time to allow the Triac anode current to reach the latching level IL (see Reference 1 for further information on this parameter). Figure 12 explains this point. The gate current has to be higher than the maximum specified IGT up to reaching a load current, i.e an anode current, higher than the maximum latching current (according to datasheet maximum value, but also for the lowest junction temperature as IL increases with temperature decrease). This will ensure a correct Triac turn on. Figure 12. Required gate pulse width, with Diac circuit, to trigger the Triac When the pulse width (tp) is defined, Figure 13 (from the DB3TG datasheet) can then be used to define the Rs and C values. For example, if a 15 µs pulse width is required, a 33 Ω resistor Rs is required with a 150 nF capacitor C. It should be noted also that resistor Rs is helpful to keep Diac current below its maximum repetitive current allowed (ITRM parameter). Figure 13. Typical pulse width duration versus Rs and C values time Load current Gate current time Zoom IL MAX IGT MAX t p time Load current Gate current time I I 15 µs 150 nF |
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