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UPD70320 Datasheet(PDF) 8 Page - NEC |
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UPD70320 Datasheet(HTML) 8 Page - NEC |
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8 / 74 page ![]() 8 µPD70320 1.2 Non-port Pins Pin Name Input/Output Function TxD0 Output Serial data output TxD1 RxD0 Input Serial data input RxD1 CTS0 Input & output CTS input in asynchronous mode, receive clock input/output in I/O interface mode CTS1 Input CTS input REFRQ Output DRAM refresh pulse output VTH Input Comparator reference voltage input RESET Reset signal input EA External memory access (connect to GND via a resistor (3 to 10 k Ω)) X1 Input Used to connect crystal resonator/ceramic resonator for oscillating system clock. X2 External clock is entered by entering reverse phase clock to both X1 and X2 pins. D0 to D7 Input & output 8-bit data bus A0 to A19 Output 20-bit address output MREQ Output used to indicate that memory bus cycle has been started MSTB Memory read/memory write strobe output R/ W Read cycle/write cycle ID signal output IOSTB I/O read /I/O write strobe output VDD Positive power supply pins (all pins should be connected) GND GND pins (all pins should be connected) IC Internally connected (connect individually to VDD via a resistor (3 to 10 k Ω)) |
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