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AN4031 Datasheet(PDF) 34 Page - STMicroelectronics |
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AN4031 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 36 page ![]() Conclusion AN4031 34/36 DocID022648 Rev 1 5 Conclusion The STM32F2/F4 DMA controller is designed to cover most of the embedded use case applications by: • Giving flexibility to firmware to choose the suitable combination between 16 streams X 16 channels (eight for each DMA), • Reducing the total latency time for a DMA transfer, thanks to dual AHB port architecture, and direct path to APB bridges avoiding CPU stall on AHB1 access when DMA is servicing low-speed APB peripherals, • FIFOs implementation on DMA allows more flexibility to firmware to configure different data sizes between source and destination, and speeds-up transfers when using incremental burst transfer mode. |
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