RM0312 datasheet(38/275 Pages) STMICROELECTRONICS

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Flash program memory and data EEPROM

RM0312

38/275

DocID022352 Rev 3

4.8.4

Data EEPROM unprotection key register (FLASH_DUKR)

Address offset: 0x03

Reset value: 0x00

4.8.5

Flash status register (FLASH_IAPSR)

Address offset: 0x04

Reset value: 0xX0 where X is undefined

654

3210

MASS_DATA KEYS

Bits 7:0 DUK[7:0]: Data EEPROM write unlock keys

This byte is written by software (all modes). It returns 0x00 when read.

Refer to Enabling write access to the DATA area on page 30 for the description of main

program area write unprotection mechanism.

654

3210

Reserved

DUL

EOP

PUL

WR_PG_DIS

rc_w0

rc_r

rc_w0

rc_r

Bits 7:4 Reserved

Bit 3 DUL: Data EEPROM area unlocked flag

This bit is set by hardware and cleared by software by programming it to 0.

0: Data EEPROM area write protection enabled

1: Data EEPROM area write protection has been disabled by writing the correct MASS

keys

Bit 2 EOP: End of programming (write or erase operation) flag

This bit is set by hardware. It is cleared by software by reading the register, or when a new

write/erase operation starts.

0: No EOP event occurred

1: An EOP operation occurred. An interrupt is generated if the IE bit is set in the

FLASH_CR1 register.

Bit 1 PUL: Flash Program memory unlocked flag

This bit is set by hardware and cleared by software by programming it to 0.

0: Write protection of main Program area enabled

1: Write protection of main Program area has been disabled by writing the correct MASS

keys.

Bit 0 WR_PG_DIS: Write attempted to protected page flag

This bit is set by hardware and cleared by software by reading the register.

0: No WR_PG_DIS event occurred

1: A write attempt to a write protected page occurred. An interrupt is generated if the IE bit

is set in the FLASH_CR1 register.

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