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LTC3413 Datasheet(PDF) 11 Page - Linear Technology

Part # LTC3413
Description  3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination
PDF  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3413 Datasheet(HTML) 11 Page - Linear Technology

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LTC3413
11
3413fc
APPLICATIONS INFORMATION
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3413 in dropout at an
input voltage of 3.3V, a load current of 3A and an ambi-
ent temperature of 70°C. From the Typical Performance
graph of switch resistance, the RDS(ON) of the P-channel
switch at 70°C is approximately 97mΩ. Therefore, power
dissipated by the part is:
PD = (ILOAD2)(RDS(ON)) = (3A)2(97mΩ) = 0.87W
For the TSSOP package, the
θJA is 38°C/W. Thus the junc-
tion temperature of the regulator is:
TJ = 70°C + (0.87W)(38°C/W) = 103°C
which is below the maximum junction temperature of
125°C.
Notethatathighersupplyvoltages,thejunctiontemperature
is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to
ΔILOAD(ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or dis-
charge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem. The ITH
pin external components and output capacitor shown in
Figure 1a will provide adequate compensation for most
applications.
Output Voltage Tracking of VREF
For applications in which the VREF pin is connected to
the VIN pin, the output voltage will be equal to one-half
of the voltage on the VIN pin. Because the output voltage
will track the input voltage, any disturbance on VIN will
appear on VOUT. For example, a load step transient could
cause the input voltage to drop if there is insufficient bulk
capacitance at the VIN pin. The corresponding drop in the
output voltage during the load step transient is caused by
the VOUT tracking of VIN and should not be confused with
poor load regulation.
Design Example
As a design example, consider using the LTC3413 in an
application with the following specifications: VIN = 2.5V,
VOUT = 1.25V, IOUT(MAX) = ±3A, f = 1MHz.
First, calculate the timing resistor:
Rk
k
OSC =Ω =
Ω
323 10
110
10
313
11
6
.•
•
–
Use a standard value of 309k. Next, calculate the inductor
value for about 40% ripple current:
L
V
MHz
A
V
V
= ⎛
⎝⎜
⎞
⎠⎟
⎛
⎝⎜
⎞
⎠⎟
=
125
11 2
1
125
25
04
.
•.
–
.
.
.7
7
μH
Using a 0.47μH inductor results in a maximum ripple
current of:
Δ=
μ
⎛
⎝⎜
⎞
⎠⎟
⎛
⎝⎜
⎞
⎠⎟
I
V
MHz
H
V
V
L
125
10 47
1
125
25
.
•.
–
.
.
== 133
.A
COUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
two 100μF ceramic capacitors will be used. CIN should be
sized for a maximum current rating of:
IA
V
V
V
V
A
RMS
RMS
=
⎛
⎝⎜
⎞
⎠⎟
=
3
125
25
25
125
11 5
.
.
.
.
–.
Decoupling the PVIN pins with two 100μF capacitors is
adequate for most applications. Connect the VREF pin
directly to SVIN. Connecting the VFB pin directly to VOUT
will set the output voltage equal to one-half of the volt-
age on the VREF pin. The complete circuit for this design
example is illustrated in Figure 3.



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