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LTC3413 Datasheet(PDF) 6 Page - Linear Technology |
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LTC3413 Datasheet(HTML) 6 Page - Linear Technology |
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6 / 16 page ![]() LTC3413 6 3413fc Main Control Loop The LTC3413 is a monolithic, constant frequency, current mode step-down DC/DC converter that is capable of sourc- ing and sinking current at the output. During normal opera- tion, the internal top power switch (P-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power MOSFET. The peak inductor current at which the current comparator shuts off the top power switch is controlled by the voltage on the ITH pin. The error amplifier adjusts the voltage on the ITH pin by comparing the feedback signal on the VFB pin with a ref- erence voltage that is equal to one-half of the voltage on the VREF pin. When the load current increases, it causes a reduction in the feedback voltage relative to the refer- ence. The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The bottom current limit is set at –7A. The operating frequency is set by an external resistor connected between the RT pin and ground. The switching frequency can range from 300kHz to 2MHz. Overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage comes out of regulation by ±10%. In an overvoltage condition, the top power MOSFET is turned off and the bottom power MOSFET is switched on until either the overvoltage condition clears or the bottom MOSFET’s current limit is reached. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the – + – + 16 10 9 PVIN 3 ITH 6 VREF 1 8 SVIN SGND 4 VFB PGOOD SVIN PVIN SLOPE COMPENSATION RECOVERY SLOPE COMPENSATION PMOS CURRENT COMPARATOR NMOS CURRENT COMPARATOR OSCILLATOR ERROR AMPLIFIER LOGIC RUN RUN/SS RT 11 14 15 SW SW SW SW 13 7 5 PGND 3413 BD 12 PGND 2 1.1VREF 2 0.9VREF 2 FUNCTIONAL DIAGRAM OPERATION |
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