LT1576CS8 datasheet(19/28 Pages) LINER

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LT1576/LT1576-5

APPLICATIONS INFORMATION

At power-up, when VC is being clamped by the FB pin (see

Figure 2, Q2), the sync function is disabled. This allows the

frequency foldback to operate in the shorted output con-

dition. During normal operation, switching frequency is

controlled by the internal oscillator until the FB pin reaches

0.7V, after which the SYNC pin becomes operational. If no

synchronization is required, this pin should be connected

to ground.

THERMAL CALCULATIONS

Power dissipation in the LT1576 chip comes from four

sources: switch DC loss, switch AC loss, boost circuit

current, and input quiescent current. The following formu-

las show how to calculate each of these losses. These

formulas assume continuous mode operation, so they

should not be used for calculating efficiency at light load

currents.

Switch loss:

ns I

SW OUT

OUT

() ( )

()( )( )

Boost current loss:

BOOST

OUT

()

Quiescent current loss:

OUT







 +















()

−−

055 10

1 6 10

0 004

.•

. •

RSW = Switch resistance (≈ 0.2Ω)

60ns = Equivalent switch current/voltage overlap time

f = Switch frequency

Example: with VIN = 10V, VOUT = 5V and IOUT = 1A:

BOOST

= ()( ) ( ) + 



()( )









= () (

)

= 



 +







 +

() ( )

−

−−

02 1 5

60 10

1 10 2 00 10

012

0 22

51 50

005

10 0 55 10

5 1 6 10

0 004

••

.•

. •

..02W

Total power dissipation is 0.22 + 0.05 + 0.02 = 0.29W.

Thermal resistance for LT1576 package is influenced by

the presence of internal or backside planes. With a full

plane under the SO package, thermal resistance will be

about 80

°C/W. No plane will increase resistance to about

120

°C/W. To calculate die temperature, add in worst-case

ambient temperature:

TJ = TA + θJA (PTOT)

With the SO-8 package (

θJA = 80°C/W), at an ambient

temperature of 50

°C,

TJ = 50 + 80 (0.29) = 73.2°C

Die temperature is highest at low input voltage, so use

lowest continuous input operating voltage for thermal

calculations.

FREQUENCY COMPENSATION

Loop frequency compensation of switching regulators

can be a rather complicated problem because the reactive

components used to achieve high efficiency also intro-

duce multiple poles into the feedback loop. The inductor

and output capacitor on a conventional step-down con-

verter actually form a resonant tank circuit that can exhibit

peaking and a rapid 180

° phase shift at the resonant

frequency. By contrast, the LT1576 uses a “current mode”

architecture to help alleviate phase shift created by the

inductor. The basic connections are shown in Figure 9.

Figure 10 shows a Bode plot of the phase and gain of the

power section of the LT1576, measured from the VC pin to

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