LT1576CS8 datasheet(28/28 Pages) LINER

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LT1576/LT1576-5

1576f LT/TP 0999 4K • PRINTED IN USA

©LINEAR TECHNOLOGY CORPORATION 1999

TYPICAL APPLICATION

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408)432-1900 q FAX:(408)434-0507 q www.linear-tech.com

BOOST

LT1576

VIN

OUTPUT

–5V†

* L1 IS A SINGLE CORE WITH TWO WINDINGS

COILTRONICS CTX33-2

** AVX TSPD107M010

† IF LOAD CAN GO TO ZERO, AN OPTIONAL

PRELOAD OF 1k TO 5k MAY BE USED TO

IMPROVE LOAD REGULATION

INPUT

6V TO 25V

GND

1576 F17

0.33

µF

100pF

1N5818

C1**

100

µF

10V TANT

C5**

100

µF

10V TANT

µF

35V TANT

C4**

100

µF

1N914

15.8k

4.99k

1N5818

L1A*

µH

L1B*

VSW

BIAS

GND

SHDN

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Figure 17. Dual Output SEPIC Converter

Dual Output SEPIC Converter

The circuit in Figure 17 generates both positive and

negative 5V outputs with a single piece of magnetics. L1

is a 33

µH surface mount inductor from Coiltronics. It is

manufactured with two identical windings that can be

connected in series or parallel. The topology for the 5V

output is a standard buck converter. The – 5V topology

would be a simple flyback winding coupled to the buck

converter if C4 were not present. C4 creates the SEPIC

(Single-Ended Primary Inductance Converter) topology

which improves regulation and reduces ripple current in

L1. Without C4, the voltage swing on L1B compared to

L1A would vary due to relative loading and coupling

losses. C4 provides a low impedance path to maintain an

equal voltage swing in L1B, improving regulation. In a

flyback converter, during switch on time, all the converter’s

energy is stored in L1A only, since no current flows in L1B.

At switch off, energy is transferred by magnetic coupling

into L1B, powering the – 5V rail. C4 pulls L1B positive

during switch on time, causing current to flow, and energy

to build in L1B and C4. At switch off, the energy stored in

both L1B and C4 supply the – 5V rail. This reduces the

current in L1A and changes L1B current waveform from

square to triangular. For details on this circuit see Design

Note 100.

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