UPD75512 datasheet(49/64 Pages) NEC

49 / 64 page

µPD75512(A)

AC CHARACTERISTICS (Ta = -40 to +85

°C, VDD = 2.7 to 6.0 V)

(1)

Basic Operation

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

tCY

w/main system clock

VDD = 4.5 to 6.0 V

0.95

µs

3.8

µs

w/sub-system clock

114

122

125

µs

TI0 Input Frequency

fTI

VDD = 4.5 to 6.0 V

MHz

275

kHz

TI0 Input High-,

tTIH,VDD = 4.5 to 6.0 V

0.48

µs

Low-Level Widths

tTIL

1.8

µs

Interrupt Input High-,

tINTH,

INT0

µs

Low-Level Widths

tINTL

INT1, 2, 4

µs

KR0-7

µs

RESET Low-Level Width

tRSL

µs

*1: The CPU clock (

Φ) cycle time is

determined by the oscillation frequency

of the connected oscillator, system clock

control register (SCC), and processor

clock control register (PCC). The figure

on the right is cycle time tCY vs. supply

voltage VDD characteristics at the main

system clock.

2: 2tCY or 128/fX depending on the setting

of the interrupt mode register (IM0).

012

0.5

Supply voltage VDD [V]

tCY vs VDD

(with main system clock)

Guaranteed operating range

CPU Clock Cycle Time*1

(Minimum Instruction

Execution Time

= 1 Machine Cycle)

UPD75512 Datasheet(PDF) 49 Page - NEC

UPD75512 Datasheet(HTML) 49 Page - NEC

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