LTC1149CS datasheet(9/20 Pages) LINER

9 / 20 page

LTC1149

LTC1149-3.3/LTC1149-5

APPLICATIO S I FOR ATIO

Inductor Core Selection

Once the minimum value for L is known, the type of

inductor must be selected. High efficiency converters

generally cannot afford the core loss found in low cost

powdered iron cores, forcing the use of more expensive

ferrite, molypermalloy, or Kool M

µ® cores. Actual core

loss is independent of core size for a fixed inductor value,

but it is very dependent on inductance selected. As induc-

tance increases, core losses go down. Unfortunately,

increased inductance requires more turns of wire and

therefore copper losses increase.

Ferrite designs have very low core loss, so design goals

can concentrate on copper loss and preventing saturation.

Ferrite core material saturates “hard,” which means that

inductance collapses abruptly when the peak design cur-

rent is exceeded. This results in an abrupt increase in

inductor ripple current and consequent output voltage

ripple which can cause Burst Mode operation to be falsely

triggered in the LTC1149 series. Do not allow the core to

saturate!

Molypermalloy (from Magnetics, Inc.) is a very good, low

loss core material for toroids, but it is more expensive than

ferrite. A reasonable compromise from the same manu-

facturer is Kool M

µ. Toroids are very space efficient,

especially when you can use several layers of wire.

Because they generally lack a bobbin, mounting is more

difficult. However, new surface mount designs available

from Coiltronics do not increase the height significantly.

P-Channel MOSFET Selection

Two external power MOSFETs must be selected for use

with the LTC1149 series: a P-channel MOSFET for the

main switch, and an N-channel MOSFET for the synchro-

nous switch.

The minimum input voltage determines whether standard

threshold or logic-level threshold MOSFETs must be used.

For VIN > 8V, standard threshold MOSFETs (VGS(TH) < 4V)

may be used. If VIN is expected to drop below 8V, logic-

level threshold MOSFETs (VGS(TH) < 2.5V) are strongly

recommended. When logic-level MOSFETs are used, the

absolute maximum VGS rating for the MOSFETs must be

greater than the LTC1149 series internal regulator

voltage VCC.

Selection criteria for the P-channel MOSFET include the

on-resistance RDS(ON), reverse transfer capacitance CRSS,

input voltage and maximum output current. When the

LTC1149 is operating in continuous mode, the duty cycle

for the P-channel MOSFET is given by:

P-Ch Duty Cycle =

VOUT

VIN

The P-channel MOSFET dissipation at maximum output

current is given by:

P-Ch PD =

VOUT

VIN

+ K(VIN)

2(IMAX)(CRSS)(f)

(IMAX)

2(1 +

∂P) RDS(ON)

where

∂ is the temperature dependency of RDS(ON) and K

is a constant related to the gate drive current. Note the two

distinct terms in the equation. The first gives the I2R

losses, which are highest at low input voltages, while the

second gives the transition losses, which are highest at

high input voltages. For VIN < 24V, the high current

efficiency generally improves with larger MOSFETs

(although gate charge losses begin eating into the gains.

See Efficiency Considerations). For VIN > 24V, the transi-

tion losses rapidly increase to the point that the use of a

higher RDS(ON) device with lower CRSS actually provides

higher efficiency. This is illustrated in the Design Example

section.

The term (1 +

∂) is generally given for a MOSFET in the

form of a normalized RDS(ON) vs temperature curve, but

∂ = 0.007/°C can be used as an approximation for low

voltage MOSFETs. CRSS is usually specified in the MOSFET

electrical characteristics. The constant K is much harder to

pin down, but K = 5 can be used for the LTC1149 series to

estimate the relative contributions of the two terms in the

P-channel dissipation equation.

N-Channel MOSFET and D1 Selection

The same input voltage constraints apply to the N-channel

MOSFET as to the P-channel with regard to when logic-

level devices are required. However, the dissipation calcu-

lation is quite different. The duty cycle and dissipation for

Kool M

µ is a registered trademark of Magnetics, Inc.

LTC1149CS Datasheet(PDF) 9 Page - Linear Technology

LTC1149CS Datasheet(HTML) 9 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL