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LTC1149

LTC1149-3.3/LTC1149-5

APPLICATIO S I FOR ATIO

Figure 8. LTC1149 Series Layout Diagram (see Layout Checklist)

in series with each sense lead to help decouple Pins 8

and 9. However, when these resistors are used, the

capacitor should be no larger than 1000pF.

4. Does the (+) plate of CIN connect to the source of the

P-channel MOSFET as closely as possible? An addi-

tional 0.1

µF ceramic capacitor between VIN and power

ground may be required in some applications.

5. Is the VCC decoupling capacitor connected closely

between Pin 5 of the LTC1149 and power ground? This

capacitor carries the MOSFET driver peak currents.

6. Is the SHDN1 Pin 10 (fixed output versions only)

actively pulled to ground during normal operation? The

SHDN1 pin is high impedance and must not be allowed

to float. In adjustable versions, Pin 10 is the feedback

pin and is very sensitive to pickup from the switch node.

Care must be taken to isolate VFB from possible capaci-

tive coupling of the inductor switch signal.

Troubleshooting Hints

Since efficiency is critical to LTC1149 series applications,

it is very important to verify that the circuit is functioning

correctly in both continuous and Burst Mode operation.

The waveform to monitor is the voltage on the timing

capacitor Pin 6.

In continuous mode (ILOAD > IBURST) the voltage on Pin 6

should be a sawtooth with a 0.9VP-P swing. This voltage

should never dip below 2V as shown in Figure 9a.

When load currents are low (ILOAD < IBURST) Burst Mode

operation should occur with the CT pin waveform periodi-

cally falling to ground as shown in Figure 9b.

If Pin 6 is observed falling to ground at high output

currents, it indicates poor decoupling or improper ground-

ing. Refer to the Board Layout Checklist.

Figure 9. CT Pin 6 Waveforms

3.3V

(a) CONTINUOUS MODE OPERATION

3.3V

(b) Burst Mode OPERATION

1149 F09

PGATE

VIN

VCC

PDRIVE

VCC

ITH

SENSE–

CAP

SD2

RGND

NGATE

PGND

SGND

COUT

P-CHANNEL

3300pF

RSENSE

N-CHANNEL

CIN

–

VOUT

VIN

OUTPUT DIVIDER REQUIRED WITH

ADJUSTABLE VERSION ONLY

BOLD LINES INDICATE HIGH CURRENT PATHS

1149 F08

1000pF

VFB/

SHDN1

SENSE+

100pF

µF

0.068

µF

1N4148

SHUTDOWN

0.047

µF

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