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LTC1196 Datasheet(PDF) 15 Page - Linear Technology |
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LTC1196 Datasheet(HTML) 15 Page - Linear Technology |
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15 / 28 page ![]() 15 LTC1196/LTC1198 S APPLICATI I FOR ATIO Connection to a microprocessor or a DSP serial port is quite simple (see Data Transfer section). It requires no additional hardware, but the speed will be limited by the clock rate of the microprocessor or the DSP which limits the conversion time of the LTC1196/LTC1198. Data Transfer Data transfer differs slightly between the LTC1196 and the LTC1198. The LTC1196 interfaces over 3 lines: CS, CLK and DOUT. A falling CS initiates data transfer as shown in the LTC1196 Operating Sequence. After CS falls, the first CLK pulse enables DOUT. After two null bits, the A/D conversion result is output on the DOUT line. Bringing CS high resets the LTC1196 for the next data exchange. The LTC1198 can transfer data with 3 or 4 wires. The additional input, DIN, is used to select the 2-channel MUX configuration. The data transfer between the LTC1198 and the digital systems can be broken into two sections: Input Data Word and A/D Conversion Result. First, each bit of the input data word is captured on the rising CLK edge by the LTC1198. Second, each bit of the A/D conversion result on the DOUT line is updated on the rising CLK edge by the LTC1198. This bit should be captured on the next rising CLK edge by the digital systems (see A/D Conversion Result section). Data transfer is initiated by a falling chip select (CS) signal as shown in the LTC1198 Operating Sequence. After CS falls the LTC1198 looks for a start bit. After the start bit is received, the 4-bit input word is shifted into the DIN input. The first two bits of the input word configure the LTC1198. The last two bits of the input word allow the ADC to acquire the input voltage by 2.5 clocks before the conversion starts. After the conversion starts, two null bits and the conversion result are output on the DOUT line. At the end of the data exchange CS should be brought high. This resets the LTC1198 in preparation for the next data ex- change. Input Data Word The LTC1196 requires no DIN word. It is permanently configured to have a single differential input. The conver- sion result is output on the DOUT line in an MSB-first sequence, followed by zeros indefinitely if clocks are continuously applied with CS low. The LTC1198 clocks data into the DIN input on the rising edge of the clock. The input data word is defined as follows: Start Bit The first “logical one” clocked into the DIN input after CS goes low is the start bit. The start bit initiates the data transfer. The LTC1198 will ignore all leading zeros which precede this logical one. After the start bit is received, the remaining bits of the input word will be clocked in. Further inputs on the DINpinarethenignoreduntilthenextCScycle. Multiplexer (MUX) Address The 2 bits of the input word following the START bit assign the MUX configuration for the requested conversion. For a given channel selection, the converter will measure the voltage between the two channels indicated by the “+” and “–” signs in the selected row of the following table. In single-ended mode, all input channels are measured with respect to GND. DIN1 DIN2 DOUT1 DOUT2 CS SHIFT MUX ADDRESS IN 2 NULL BITS SHIFT A/D CONVERSION RESULT OUT 1196/98 AI01 SGL/ DIFF ODD/ SIGN DUMMY START MUX ADDRESS DUMMY BITS 119698 AI02 DUMMY LTC1198 Channel Selection MUX ADDRESS SGL/DIFF 1 1 0 0 ODD/SIGN 0 1 0 1 CHANNEL # 0 + + – 1 + – + GND – – SINGLE-ENDED MUX MODE DIFFERENTIAL MUX MODE 1196/98 AI03 |
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