LTC1421 datasheet(8/24 Pages) LINER

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LTC1421/LTC1421-2.5

APPLICATIONS INFORMATION

Hot Circuit Insertion

When circuit boards are inserted into a live backplane, the

supply bypass capacitors on the board can draw huge

transient currents from the backplane power bus as they

charge up. The transient currents can cause permanent

damage to the connector pins and cause glitches on the

system supply, causing other boards in the system to

reset. At the same time, the system data bus can be

disrupted when the board’s data pins make or break

connection.

The LTC1421 is designed to turn a board’s supply voltages

on and off in a controlled manner, allowing the board to be

safely inserted or removed from a live backplane. The chip

also provides a disable signal for the board’s data bus

buffer during insertion or removal and provides all the

necessary supply supervisory functions for the board.

Power Supply Ramping

The power supplies on a board are controlled by placing

external N-channel pass transistors in the power path

(Figure 3). R1 and R2 provide current fault detection. By

ramping the gate of the pass transistor up at a controlled

rate, the transient surge current (I = C • dV/dt) drawn from

the main backplane supply can be limited to a safe value

when the board makes connection.

Figure 3: Supply Control Circuitry

110

12V

VCCLO SETLO GATELO VOUTLO

LTC1421

1421 F03

VCCHI SETHI GATEHI VOUTHI

RAMP

CON1

CON2

CRAMP

VOUTHI

VOUTLO

When power is first applied to the chip, the gates of both

N-channels, GATELO and GATEHI are pulled low. After the

connection sense pins, CON1 and CON2 are both held low

for at least 20ms, a 20

µA reference current is connected

from the RAMP pin to GND. The voltage at GATEHI begins

to rise with a slope equal to 20

µA/CRAMP(Figure 4), where

CRAMP is an external capacitor connected between the

Figure 4. Supplies Turning On

12V

1421 F4a

VOUTHI

VOUTLO

SLOPE = 20

µA/CRAMP

–12V

~1ms

–12V

CPON

16k

VEE

~1ms

1421 F05

20k

0.047

µF

220

µF

VEE

–12V

1/2 MMDF3N0HD

–12V FROM

CONNECTOR

CPON

LTC1421

Figure 5. Negative Supply Control

RAMP and GATEHI pins. The voltage at the GATELO pin is

clamped one Schottky diode drop below GATEHI.

The ramp time for each supply is equal to: t = (VCC)

(CRAMP)/20µA. During power down the gates are actively

pulled down by two internal NFETs.

A negative supply voltage can be controlled using the

CPON pin as shown in Figure 5.

When the board makes connection, the transistor Q3 is

turned off because it’s gate is pulled low to –12V by R4.

CPON is also pulled to –12V. When the charge pump is

turned on, CPON is pulled to VCCLO and the gate of Q3 will

ramp up with a time constant determined by R4, R5 and

C2. When the charge pump is turned off, CPON goes into

a high impedance state, the gate of Q3 is discharged to VEE

with a time constant determined by R4 and C2, and Q3

turns off.

LTC1421 Datasheet(PDF) 8 Page - Linear Technology

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