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LTC1703 Datasheet(PDF) 3 Page - Linear Technology |
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LTC1703 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 36 page ![]() 3 LTC1703 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: PVCC and BVCC (VBOOST – VSW) must be greater than VGS(ON) of the external MOSFETs used to ensure proper operation. Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 4: Supply current in normal operation is dominated by the current needed to charge and discharge the external MOSFET gates. This current will vary with supply voltage and the external MOSFETs used. Note 5: Supply current in shutdown is dominated by external MOSFET leakage and may be significantly higher than the quiescent current drawn by the LTC1703, especially at elevated temperature. Note 6: This parameter is guaranteed by correlation and is not tested directly. Note 7: Each built-in pull-up resistor attached to the VID inputs also has a series diode connected to VCC to allow input voltages higher than the VCC supply without damage or clamping. (See Block Diagram.) Note 8: Feedback current at FB1 will be higher due to internal VID resistors. Note 9: Rise and fall times are measured using 10% and 90% levels. Delay and nonoverlap times are measured using 50% levels. The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VCC = 5V unless otherwise specified. (Note 3) ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Characteristics VOSC Oscillator Amplitude 1VP-P fOSC Oscillator Frequency Test Circuit 1 q 475 550 750 kHz ΦOSC2 Controller 2 Oscillator Phase Relative to Controller 1 180 DEG DCMIN1 Minimum Duty Cycle VFB < VMAX q 710 % DCMIN2 Minimum Duty Cycle VFB > VMAX q 0% DCMAX Maximum Duty Cycle q 87 90 93 % tNOV Driver Nonoverlap Test Circuit 1 (Note 9) q 40 100 ns tr, tf Driver Rise/Fall Time Test Circuit 1 (Note 9) q 12 80 ns Feedback Amplifier AVFB FB DC Gain q 74 85 dB GBW FB Gain Bandwidth 25 MHz IERR FB Sink/Source Current COMPN Output q ±3 ±10 mA VMIN MIN Comparator Threshold q 760 785 mV VMAX MAX Comparator Threshold q 815 840 mV Current Limit Loop AVILIM ILIM Gain 40 dB IIMAX IMAX Source Current IMAX = 0V q –7 –10 –13 µA Status Outputs VFAULT FAULT Trip Point VFB Relative to Regulated VOUT q +10 + 15 +20 % VOLF FAULT Output Low Voltage IFAULT = 1mA q 0.03 0.1 V IFAULT FAULT Output Current VFAULT = 0V – 10 µA tFAULT FAULT Delay Time VFB > VFAULT to FAULT (Note 9) 25 µs VID Inputs R11 Resistance Between SENSE and FB1 10 k Ω VOUT Error % Output Voltage Accuracy (Side 1) Programmed from 0.9V to 2V q – 1.5 1.5 % RPULLUP VID Input Pull-Up Resistance VDIODE = 0.6V (Note 7) 40 k Ω VIDT VID Input Voltage Threshold VIL (2.7V ≤ VCC ≤ 5.5V) 0.4 V VIH (2.7V ≤ VCC ≤ 5.5V) 1.6 V IVID-LEAK VID Input Leakage Current VCC < VID < 7V (Note 7) 0.01 ±1 µA VPULLUP VID Pull-Up Voltage VCC = 3.3V 2.8 V VCC = 5V 4.5 V |
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