UPD98411 datasheet(21/36 Pages) NEC

21 / 36 page

Data Sheet

S12953EJ4V0DS00

µµµµPD98411

1.6

Power Supply and Ground

Pin Name

Pin No

I/O

Function

VDD

8, 14, 21, 40, 46, 61, 81,

100, 120, 132, 140, 147,

160, 164, 173, 181, 187,

194, 201, 208, 214, 220,

227, 234, 240

GND

1 ,2, 11, 20, 35, 41, 50,

60, 62, 80, 101, 107, 121,

122, 139, 148, 154, 161,

167, 179, 180, 188, 191,

200, 207, 221, 224, 233

Low-speed section logic power supply (+3.3V±5%) and ground.

VDD-PEC

GND-PEC

TFKT/TFKC input high-speed part power supply (+3.3V±5%)

and ground.

Noise from this power supply affects the jitter characteristic.

Eliminate noise through countermeasures such as filters.

VDD-CS

GND-CS

Transmit clock synthesizer PLL power supply (+3.3V±5%) and

ground.

Noise from this power supply affects the jitter characteristic.

Eliminate noise through countermeasures such as filters.

VDD-PE3

VDD-PE2

VDD-PE1

VDD-PE0

97, 106

88, 95

77, 86

68, 75

Each port high-speed section, receive clock recovery section

power supply (+3.3V±5%).

Noise from this power supply affects the jitter characteristic.

Eliminate noise through countermeasures such as filters.

GND-PE3

GND-PE2

GND-PE1

GND-PE0

102, 103

91, 92

82, 83

71, 72

Each port high-speed section, receive clock recovery section

ground.

Noise from this power supply affects the jitter characteristic.

Eliminate noise through countermeasures such as filters.

1.7

Others

Pin Name

Pin No.

I/O Level

I/O

Function

48, 87, 96,

108-115

123

CMOS

These refer to the internal circuit connection test pins.

Be sure to leave them open.

UPD98411 Datasheet(PDF) 21 Page - NEC

UPD98411 Datasheet(HTML) 21 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL